similar to: [LLVMdev] llvm projects for famous benchmark suits

When I searched for branch frequency profiling on the internet, I got this link by a casual chance: http://homepages.dcc.ufmg.br/~rimsa/tools/stprof-llvm.patch. It seems it was written by Andrei Rimsa. So I downloaded and integrate these files into the llvm-2.8 building. After the building, I tried "opt -static-profile bitcnt_1.bc", and an segment fault error occured. I debugged it

I have built and configured the test suits as told at http://llvm.org/docs/TestingGuide.html#testsuite. The llvm is built with configuration: SRC_DIR/configure --prefix=INS_DIR --enable-debug-runtime --disable-optimized --enable-debug-symbols --enable-assertions This configuration is used again in the re-configure process. However, after the re-configure process, the following "make"

---------- Forwarded message ---------- From: Qingan Li <ww345ww at gmail.com> Date: 2011/5/30 Subject: To: llvmdev at cs.uiuc.edu Hi, I wrote an analysis pass, myPass, inherited from both ModulePass and ProfileInfo, and this pass requires the CallGraph, i.e., * class myPass : public ModulePass, public ProfileInfo { ...};* * void myPass::getAnalysisUsage(AnalysisUsage &AU) const

Hal's advice helps me a lot to understand the implementation much better. Thanks so much! So, now I am able to state my problem more clearly: 1) There are two kinds of locals, i.e., the local variables originated from the source code (like C/C++), and the compilation generated temporaries. After instruction selection phase, the former is seen as frame indexes, while the latter is seen as

---------- Forwarded message ---------- From: Qingan Li <ww345ww at gmail.com> Date: 2011/1/19 Subject: Re: [LLVMdev] About test suits Cont1 To: Eric Christopher <echristo at apple.com> *I am sorry for making you confused when I presented my problem.* *1. My steps for the test suit building:* (1) cd /home/qali/Src; * // This is my source directory for all application

*1. I have searched the access/setting of LLVMCC_EMITIR_FLAG in the build directory, recursively, and all the output is what I pasted in last email (just the same to the that in source directory). Maybe the configure failed to do it. My command list for building the test suit is as followings:* *(1) cd ~/SRC_DIR/llvm/projects* *(2) svn co http://llvm.org/svn/llvm-project/test-suite/trunk

Hi, Can anyone help me with the stack slot coloring optimization? This corresponding file is /lib/codegen/stackslotcoloring.cpp. It is said this optimization was for stack slot overlay for frame size reduction, after register allocation phase. And this transformation pass relies on the LiveStack analysis pass. How, when checking the source code, it seems the LiveStack analysis has not been

Hi sir, I have built the test suits in following steps: 0. $cd LLVM_GCC_DIR; $gunzip --stdout llvm-gcc-4.2-*version*-* platform*.tar.gz | tar -xvf - 1. $cd SRC_DIR/llvm-2.8/projects 2. $svn co http://llvm.org/svn/llvm-project/test-suite/trunk test-suite 3.$cd OBJ_DIR; 4. $SRC_DIR/configure --prefix=INS_DIR --enable-debug-runtime --disable-optimized --enable-debug-symbols

*[qali at qali llvm-2.8-rev]$ find . -exec grep -n "LLVMCC_EMITIR_FLAG" ./ {} \;* ./projects/test-suite/Makefile.tests:47: -$(LCC) $(CPPFLAGS) $(CFLAGS) $(LOPTFLAGS) $(X_TARGET_FLAGS) -S $< -o $@ $(LLVMCC_EMITIR_FLAG) ./projects/test-suite/Makefile.tests:51: -$(LCXX) $(CPPFLAGS) $(CXXFLAGS) $(LOPTFLAGS) $(X_TARGET_FLAGS) -S $< -o $@ $(LLVMCC_EMITIR_FLAG)

Thanks for your help with me about the way to access type and size of Value. But, I want also know the interface for me to access the type or size of virtual registers in the SSA form. 1. I find no way to associate the virtual registers with the Value class. 2. I also tried to get the size of register nReg by: TargetRegisterClass::getSize(), where the TargetRegisterClass object is obtained by

On 1/28/11 8:14 AM, Qingan Li wrote: > Thanks for your help with me about the way to access type and size of > Value. > But, I want also know the interface for me to access the type or size > of virtual registers in the SSA form. > 1. I find no way to associate the virtual registers with the Value class. In the in-memory LLVM IR, all of the SSA values are C++ objects derived

Hi Li Qingan, > Thanks for your last reply. > I have made a critical mistake when I stated my question in last email. > I built llvm in debug mode, but the NDEBUG seemed to be still defined, such that > the -debug option is not enabled. > I have restated my configuration below. you need to configure with --enable-assertions In spite of the name, NDEBUG is not related to

On Jan 15, 2011, at 8:06 PM, Qingan Li wrote: > [qali at qali llvm-2.8-rev]$ find . -exec grep -n "LLVMCC_EMITIR_FLAG" ./ {} \; > ./projects/test-suite/Makefile.tests:47: -$(LCC) $(CPPFLAGS) $(CFLAGS) $(LOPTFLAGS) $(X_TARGET_FLAGS) -S $< -o $@ $(LLVMCC_EMITIR_FLAG) > ./projects/test-suite/Makefile.tests:51: -$(LCXX) $(CPPFLAGS) $(CXXFLAGS) $(LOPTFLAGS) $(X_TARGET_FLAGS) -S

Thanks for your last reply. Could I understand the way to adding a pass (built into the llvm rather than dynamic loadable) includes: 1. Declaring a creator function for this pass 2. Implementing the creator function for this pass 3. Instantiating this pass and get a object of it 3. Register this pass into the PassRegistry Then, for a built-into bytecode pass, task 1(declaration of the

llvm::TargetRegisterClass::getSize() llvm::TargetRegisterClass::getAllignment() will return the size and alignment of a virtual register used both in register allocation and stack slot assignment. llvm::TargetRegisterClass::alloc_order_begin() llvm::TargetRegisterClass::alloc_order_end() will give a list of the possible physical registers. When a virtual register is assigned a physical register

On 1/27/11 3:23 AM, Qingan Li wrote: > Hi, > > I wonder if there is an interface for me to access the type or size of > virtual registers in the SSA form? > I have scanned the MachineOperand in CodeGen part, and failed to find > this kind of info for virtual registers. The getType() method of Value * will return the LLVM type. The TargetData class will provide information on

On Jan 13, 2011, at 6:22 PM, Qingan Li wrote: > make[4]: Entering directory `/home/qali/build/llvm-2.8-rev/projects/test-suite/SingleSource/UnitTests/Vector/SSE' > /home/qali/Src/llvm-2.8/autoconf/mkinstalldirs Output > /dev/null > /home/qali/build/llvm-gcc4.2-2.8-x86_64-linux/bin/llvm-gcc -I/home/qali/build/llvm-2.8-rev/projects/test-suite/SingleSource/UnitTests/Vector/SSE

Hi, I wonder if there is an interface for me to access the type or size of virtual registers in the SSA form? I have scanned the MachineOperand in CodeGen part, and failed to find this kind of info for virtual registers. -- Best regards, Li Qingan -------------- next part -------------- An HTML attachment was scrubbed... URL:

[qali at qali test-suite]$ make VERBOSE=1 if [ ! -f SingleSource/Makefile ]; \ then \ /home/qali/Src/llvm-2.8/autoconf/mkinstalldirs SingleSource; \ cp /home/qali/Src/llvm-2.8/projects/test-suite/SingleSource/Makefile SingleSource/Makefile; \ fi; \ make -C SingleSource all make[1]: Entering directory `/home/qali/build/llvm-2.8-rev/projects/test-suite/SingleSource' if [ ! -f UnitTests/Makefile

Hi, Recently, I am working on some information collection on the machine instruction (MachineInstr) level. But, sometimes, I need check the corresponding IR level instruction of the a machine instruction. When visiting a machine instruction which is a call (MachineInstr::isCall()), I need to check the arguments of this call site. I know that the CallSite class provides good facility for this