similar to: [LLVMdev] [LLVMDev] Trouble Linking

Displaying 20 results from an estimated 800 matches similar to: "[LLVMdev] [LLVMDev] Trouble Linking"

2010 Oct 15
2
[LLVMdev] [LLVMDev] Trouble Linking
I'm sorry, I don't know what you were looking for. The first 5 were scattered amidst different e-mails. The others have to do with following what "RAFast" and "RALinScan" as examples. It's a linker error, and I do not know why only opt and bugpoint does not compiler, and why llc does not show my reg alloc pass anymore. It worked before the API change e-mail was
2010 Oct 15
0
[LLVMdev] [LLVMDev] Trouble Linking
Jeff Kunkel <jdkunk3 at gmail.com> writes: > I ran cmake to build the visual studio projects. Then I included my > code under the Visual Studio interface, but I placed my code separate > from the CodeGen code. Visual studio was smart enough to compile and > link in my code into the CodeGen library. Thus, I did not need to add > my code into the same directory as the CodeGen
2010 Oct 15
3
[LLVMdev] [LLVMDev] Trouble Linking
I ran cmake to build the visual studio projects. Then I included my code under the Visual Studio interface, but I placed my code separate from the CodeGen code. Visual studio was smart enough to compile and link in my code into the CodeGen library. Thus, I did not need to add my code into the same directory as the CodeGen files, and I did not need to change the CMakeList.txt. The offical name is
2010 Oct 15
0
[LLVMdev] [LLVMDev] Trouble Linking
Jeff Kunkel <jdkunk3 at gmail.com> writes: > I am writing my register allocator directly in the LLVM tree, and I am > having trouble linking my project on windows msvc 10.0 compiler. The > error are below, but let me say what I have changed. > 1. I added "(void) llvm::createJDKunkRegisterAllocator();" to the > struct ForcePassLinking::ForcePassLinking() method in
2010 Oct 15
2
[LLVMdev] [LLVMDev] Trouble Linking
- I placed my code in the the existing CodeGen library. - No, it is not in the CMakeLists.txt. The code is separate from the rest of the CodeGen code, but it is linked into the code gen library automatically through the visual studio linker. Perhaps something funny is going on here. I will try placing the code directly in the library, and I will include it to the CMakeLists.txt. - Thanks - Jeff
2008 May 11
1
[LLVMdev] building llvm on Windows
I tried to compile on Windows ( using the win32/llvm.sln in MSVC Express 2008 ) the new 2.3 branch and here are the results: 1. I needed to copy the file Configure.exe.embed.manifest to Configure.exe.intermediate.manifest . This is a bug from the previous llvm release (2.2) 2. I copied the file SimplifyLibCalls.cpp from lib/Transforms/Scalar to lib/Transforms/IPO. I think the position of
2008 May 17
1
[LLVMdev] VS build is broken again
SimplifyLibCalls.cpp is no longer part of Transforms\IPO and Transforms\Scalar\SimplifyCFG.cpp is renamed to SimplifyCFG.cpp or something to that effect ( I didn't look up the actual checkins ). Having fixed that, I still can't get through the build: Creating library C:\work\s\llvm\win32\\bin\Win32\Debug/opt.lib and object C:\work\s\llvm\win32\\bin\Win32\Debug/opt.exp 1>opt.obj : error
2008 May 12
0
[LLVMdev] building llvm on Windows
On May 11, 2008, at 12:59 PM, Razvan Aciu wrote: > I tried to compile on Windows ( using the win32/llvm.sln in MSVC > Express > 2008 ) the new 2.3 branch and here are the results: It would be great to get any windows improvements into the 2.3 release if possible. > 1. I needed to copy the file Configure.exe.embed.manifest to > Configure.exe.intermediate.manifest . This is a
2010 Oct 15
0
[LLVMdev] [LLVMDev] Trouble Linking
Jeff Kunkel <jdkunk3 at gmail.com> writes: > - I placed my code in the the existing CodeGen library. Ok. > - No, it is not in the CMakeLists.txt. The code is separate from the > rest of the CodeGen code, but it is linked into the code gen library > automatically through the visual studio linker. If your source code is on a separate file, and that file is not listed on the
2012 Jan 30
0
[LLVMdev] initializeNAMEPass(llvm::PassRegistry&) should have been declared inside 'llvm'
Hey all, So I've been working to fix a problem I had wherein I could not properly initialize AliasAnalysis profiling information. In order to fix it, I've had to rewrite how my pass operates, such that it contains this in the FunctionPass declaration; RelRecovery() : FunctionPass(ID) { llvm::initializeRelRecoveryPass(*PassRegistry::getPassRegistry()); } and contains these
2008 May 11
9
[LLVMdev] Preferring to use GCC instead of LLVM
Not that I sympathize with the OP's manners but... Bill Wendling <isanbard at gmail.com> writes: > On May 10, 2008, at 7:55 PM, kr512 wrote: > >> See how gcc is invoked to generate the final executable >> file. This means LLVM is an incomplete backend, >> unfortunately. >> > That's only a convenience. GCC generates assembly code too and calls
2008 Oct 05
1
[LLVMdev] There are two linker error when compiling the latest llvm source...
Hi everyone.I am using the visual stuido 2005 to build the lastesllvm source code. After the building phase, the vs 2005 dump two errors with the lli and llc. Here is the message: the Error 1549 error LNK2019: unresolved external symbol "class llvm::FunctionPass * __cdecl llvm::createPBQPRegisterAllocator(void)" (?createPBQPRegisterAllocator at llvm@@YAPAVFunctionPass at 1@XZ)
2011 Jan 20
4
[LLVMdev] [LLVMDev] Live Intervals and Finding the next usage
I have a live interval, and I would like to find out what SlotIndex the next use the register will occur? Is there any way to map a live interval back into instructions or SlotIndexes or blocks used by? - Thanks Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110120/fd429dbd/attachment.html>
2010 Sep 28
2
[LLVMdev] [LLVMDev] Profiling information
How do I find the profiling or run time information for machine basic blocks from a machine function? There are quite a few optimization that may be preformed with this information, when it exists. Thanks, Jeff Kunkel
2011 Jan 18
1
[LLVMdev] adding a codegen pass into llvm
Thanks for your last reply. Could I understand the way to adding a pass (built into the llvm rather than dynamic loadable) includes: 1. Declaring a creator function for this pass 2. Implementing the creator function for this pass 3. Instantiating this pass and get a object of it 3. Register this pass into the PassRegistry Then, for a built-into bytecode pass, task 1(declaration of the
2010 Oct 09
3
[LLVMdev] [LLVMDev] Does LLVM have a random number generator?
Hello, does LLVM already have a Random Number Generator built into it's library somewhere? I know code generation is suppose to be deterministic, but when producing a random number can be deterministic if the random number generator is also deterministic. - Thanks - Jeff Kunkel
2010 Oct 05
3
[LLVMdev] [LLVMDev] Phi elimination: Who does what
Aye, between all current register allocators the 'AU.addRequiredID(PHIEliminationID);' will cause phi's to be eliminated to copies, but this misses the point of my question. What I am asking, is how does stack know that the value of the variable which the resulting value of the phi is currently allocated at. For instance take the instruction: Machine Basic Block (mbb) 12 reg16666 =
2010 Sep 03
4
[LLVMdev] [LLVMDev] [Question] How do I get the number of machine registers.
How do I get the total number of machine registers? I have currently a MachineFunction and some derivatives. How are the machine registers ordered internally? Can I index them off of a zero based array or do I have to create a map to have them be zero based? Thanks, Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL:
2010 Sep 02
5
[LLVMdev] [LLVMDev] [Modeling] About the structure of my allocator
I need to model my registers for my allocator. I need to identify the super-register and the sub-register conflicts. Something like: For each set of registers R in the set of aligned registers defined by the input request virtual register alpha. Now each register block r in R can have zero, one, or more registers defined in the block started at the aligned size and ending at the aligned size plus
2010 Oct 07
2
[LLVMdev] [LLVMDev] Has anyone written this?
It would go something like like the code below. The goal would be to turn the basic blocks which the graph looks like "...->x->y->..." where the instructions of x and y could live in the same basic block without a jump or fall through in between. bool runOnMachineFunction(MachineFunction &mf) { BitVector seen( mf.size() ); for( unsigned i = 0, e = mf.size();