similar to: [LLVMdev] What may I assume about MachineFunctions.

They cannot be found like the live in values because different values may be live out. For instance the psudocode may look like: BB0: vreg1 = rand() if( vreg1 > .5 ) goto BB1; else goto BB2; BB1: vreg 2 = rand(); EAX = copy vreg2; Return BB2: vreg 3 = rand() * rand()' EAX = copy vreg3; Return On Fri, Nov 5, 2010 at 7:41 AM, s Last namerc <srcsrc84 at yahoo.com>

How do I find the profiling or run time information for machine basic blocks from a machine function? There are quite a few optimization that may be preformed with this information, when it exists. Thanks, Jeff Kunkel

Bump: Does profiling / run time information exist when dealing with machine basic blocks? Thanks, Jeff Kunkel On Tue, Sep 28, 2010 at 9:51 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > How do I find the profiling or run time information for machine basic > blocks from a machine function? There are quite a few optimization > that may be preformed with this information, when it

Is there an easy way to obtain all liveout variables of a basic block? Liveins can be found for each MachineBasicBlock, but I can only find liveouts for the whole function, at MachineRegisterInfo. Do I need to find them out manually?

I need to model my registers for my allocator. I need to identify the super-register and the sub-register conflicts. Something like: For each set of registers R in the set of aligned registers defined by the input request virtual register alpha. Now each register block r in R can have zero, one, or more registers defined in the block started at the aligned size and ending at the aligned size plus

Under what circumstances will a TerminatorInst will have multiple successors? The three methods: virtual BasicBlock *getSuccessorV(unsigned idx) const = 0; virtual unsigned getNumSuccessorsV() const = 0; virtual void setSuccessorV(unsigned idx, BasicBlock *B) = 0; are defined for the TerminatorInst class, but I cannot see why a terminator is allowed to go to different targets. Thanks,

Hello, does LLVM already have a Random Number Generator built into it's library somewhere? I know code generation is suppose to be deterministic, but when producing a random number can be deterministic if the random number generator is also deterministic. - Thanks - Jeff Kunkel

I have a live interval, and I would like to find out what SlotIndex the next use the register will occur? Is there any way to map a live interval back into instructions or SlotIndexes or blocks used by? - Thanks Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110120/fd429dbd/attachment.html>

I'm just running VS 10 in debug mode. In a step by step set up: 1. I download the svn 2. I make my changes 3. I compile the libraries 4. I make changes to the code within my project 5. I compile my code, and I re-link llc with my changed files. 6. I repeat 4,5, and 6 until it finally works. - Jeff Kunkel On Tue, Nov 2, 2010 at 1:21 PM, Óscar Fuentes <ofv at wanadoo.es> wrote: >

On Sep 2, 2010, at 2:44 PMPDT, Jeff Kunkel wrote: > I need to track which MachineBasicBlocks branch into other > MachineBasicBlocks. How do I do it? Look at the Predecessor/Successor lists, which are target-independent > I see a MachineOperand can hold a MachineBasicBlock*. Does this mean > the instruction may branch to the MachineBasicBlock, or can it be > something like an

I am looking for the slot index of a register around the given slot index Min. Is there a better way than the linear search: ... findDefUsesAroundIndex( LiveInterval* li, SlotIndex Min ) ... for( MachineOperand * mo = MRI->getRegUseDefListHead(li->reg); mo; mo = mo->getNextOperandForReg() ) { SlotIndex si = SI->getInstructionIndex( use.getOperand().getParent() ); if(

I ran cmake to build the visual studio projects. Then I included my code under the Visual Studio interface, but I placed my code separate from the CodeGen code. Visual studio was smart enough to compile and link in my code into the CodeGen library. Thus, I did not need to add my code into the same directory as the CodeGen files, and I did not need to change the CMakeList.txt. The offical name is

You said it was expensive, but if you had to put a big-o estimate on it, what would it be? -Thanks Jeff Kunkel On Tue, Nov 2, 2010 at 8:54 PM, Andrei Alvares <logytech at gmail.com> wrote: > Hello Jeff, > > On Tue, Nov 2, 2010 at 9:17 PM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > > My god! I would love a branch predictor! It would simplify many aspects > of >

Hi, I am developing my register allocation algorithm in Visual Studio, and I am hitting long compile times. I am wondering if there is a way to cut down the time it takes for llc to link? - Thanks - Jeff Kunkel -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20101102/c0c7a2bc/attachment.html>

Is there any way to tell where in the Instruction list, the branch to the other MachineBasicBlock happens? I know in the BasicBlock had a nice api for it. Thanks, Jeff Kunkel On Thu, Sep 2, 2010 at 5:56 PM, Dale Johannesen <dalej at apple.com> wrote: > > On Sep 2, 2010, at 2:44 PMPDT, Jeff Kunkel wrote: > >> I need to track which MachineBasicBlocks branch into other

The method below takes in a register and returns a register. To me this makes no sense because when I already have a register, why would I need to get it? Could someone please explain the transformation that is happening here? /// getRegister - Return the specified register in the class. /// unsigned getRegister(unsigned i) const { assert(i < getNumRegs() && "Register

- I placed my code in the the existing CodeGen library. - No, it is not in the CMakeLists.txt. The code is separate from the rest of the CodeGen code, but it is linked into the code gen library automatically through the visual studio linker. Perhaps something funny is going on here. I will try placing the code directly in the library, and I will include it to the CMakeLists.txt. - Thanks - Jeff

I am writing my register allocator directly in the LLVM tree, and I am having trouble linking my project on windows msvc 10.0 compiler. The error are below, but let me say what I have changed. 1. I added "(void) llvm::createJDKunkRegisterAllocator();" to the struct ForcePassLinking::ForcePassLinking() method in "llvm\include\llvm\LinkAllPasses.h" 2. I added "FunctionPass*

I forgot to cc the list On Mon, Oct 11, 2010 at 6:19 PM, Jeff Kunkel <jdkunk3 at gmail.com> wrote: > Well this is my 20,000 foot viewpoint of the project you have > described. Also, I would appreciate if someone more knowledgeable > revised my statements. > > First, I would make a mock machine with large register banks for each > kind of operation and size combination. The

It would go something like like the code below. The goal would be to turn the basic blocks which the graph looks like "...->x->y->..." where the instructions of x and y could live in the same basic block without a jump or fall through in between. bool runOnMachineFunction(MachineFunction &mf) { BitVector seen( mf.size() ); for( unsigned i = 0, e = mf.size();