similar to: [LLVMdev] llvm for ARM

Hi, Any help would b appreicated. This is one of my critical assignment. Thanks Sanjeev On Thu, Jun 17, 2010 at 7:03 PM, Sanjeev chugh <sanjuchugh at gmail.com> wrote: > Hello, > > Thanks for the reply. We have an product whose one part has lot of > algorithms doing some graphics work. Our intention was to figure out if > there can be any performance gain if we use llvm

Hello, Thanks for the reply. We have an product whose one part has lot of algorithms doing some graphics work. Our intention was to figure out if there can be any performance gain if we use llvm instead of native ARM. This is for ARM target. Earlier, I have built this component using llvm and tested it on x86. Performance was 4x as compared to native gcc. Then I built llvm for ARM and tested

Yes, I'm following this page only and did whatever is mentioned there. On Mon, Jul 12, 2010 at 6:57 PM, Sanjeev chugh <sanjuchugh at gmail.com> wrote: > Did you mean ld-new ? > > ld-new -v > GNU gold (GNU Binutils 2.20.51.20100707) 1.9 > > ld-new --help > ./ld-new: supported targets: elf32-i386 elf32-i386-freebsd elf64-x86-64 > elf64-x86-64-freebsd elf64-sparc

I'm getting following errors while cross compiling llvm for ARM. Please help since it is urgent and critical My gcc version is 4.2.0, 32bit Linux and target is ARM Configure options are: ./configure --host=i686-pc-linux-gnu --build=i686-pc-linux-gnu --target=armv7fl-montavista-linux-gnueabi --enable-cross --with-sysroot=/home//arm_v7_vfp_le/target/

Hello, I'm using gold linker now to see if there can be any performance gain. Also using latest gcc version (4.4.4) and latest binutils. But when I'm compiling llvm-gcc, I'm getting this error. /home/jal/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/xgcc -B/home/jal/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/ -B/usr/local/arm-v7a8-linux-gnueabi/bin/

Hello, Since, I cudn't get performance gain using llvm compiler, I've tried to use gold linker instead of going through these following steps. a) 'llvm-gcc -c -flo -O2' to generate the .bc files. b) 'llvm-ld' to combine them into a single .bc. No, not a .so nor a .a. c) 'llc' to turn your combined .bc into a .s d) 'as' to turn your .s into a .o I followed

my g++-cross was configured with following parameters: ./configure --host=i686-pc-linux-gnu --build=i686-pc-linux-gnu --target=armv7fl-montavista-linux-gnueabi --enable-cross --with-sysroot=/home/arm_v7_vfp_le/target/ --with-build-sysroot=/home/arm_v7_vfp_le/target/ --enable-shared --enable-languages=c,c++ --with-as=/home/arm_v7_vfp_le/bin/arm_v7_vfp_le-as

> ld-new works only with those objects which are compiled using native gcc but > doesn't work for cross-compiler gcc/arm. Ok, please show: ld --version and last few lines of the ld --help output -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

Did you mean ld-new ? ld-new -v GNU gold (GNU Binutils 2.20.51.20100707) 1.9 ld-new --help ./ld-new: supported targets: elf32-i386 elf32-i386-freebsd elf64-x86-64 elf64-x86-64-freebsd elf64-sparc elf32-sparc elf64-powerpcle elf64-powerpc elf32-powerpcle elf32-powerpc elf32-bigarm elf32-littlearm On Mon, Jul 12, 2010 at 6:52 PM, Anton Korobeynikov <anton at korobeynikov.info > wrote:

On 2010-06-04 13:41, Sanjeev C wrote: > I get following errors: > > /home/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/xgcc > -B/home/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/ > -B/usr/local/armv7fl-montavista-linux-gnueabi/bin/ > -B/usr/local/armv7fl-montavista-linux-gnueabi/lib/ -isystem > /usr/local/armv7fl-montavista-linux-gnueabi/include -isystem >

This is the full description of errors I am getting /home/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/xgcc -B/home/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/ -B/usr/local/armv7fl-montavista-linux-gnueabi/bin/ -B/usr/local/armv7fl-montavista-linux-gnueabi/lib/ -isystem /usr/local/armv7fl-montavista-linux-gnueabi/include -isystem

Hello, I am new to LLVM and complier development, am more comfortable with logic gates. However, I am part of a research project that intends to develop a co-designed virtual machine reconfigurable computing, the virtual machine controls a reconfigurable fabric in addition to a microprocessor. The microprocessor may be an ARM and the system should employ a JIT to generate code for the

> ~/Desktop/Sanjeev/LLVM/llvm-2.7/Release/lib/libLLVMgold.so --eh-frame-hdr > -melf_i386 -dynamic-linker /lib/ld-linux.so.2 /usr/lib/crt1.o Ok, this way you're generating code for x86 > /usr/lib/crti.o > /usr/local/lib/gcc/i686-pc-linux-gnu/4.2.0/crtbegin.o > -L/usr/local/lib/gcc/i686-pc-linux-gnu/4.2.0  -L/usr/local/lib -lgcc > --as-needed -lgcc_s --no-as-needed -lc -lgcc

The patch prevents KEIL MDK compile warnings, like:   warning:  #1035-d: single-precision operand implicitly converted to double-precision Actually ARM Cortex-M4F has only a *single precision* (float) FPU. It's suit for all platforms. See the comment at the begin of patch file. Sincerely Forrest Zhang -------------- next part -------------- Specify the floating point constant with single

Hi Nadav, > The new type-legalization mode (-promote-elements) which enables vector-select in LLVM (and a nice perf boost for several workloads), is currently disabled because of a _single_ bug in the ARM codegen which makes a few tests fail.  If ARM is not a supported target, can I mark these tests as 'XFAIL' and enable vector-select support in LLVM ? Which testcase is it? -- With

No. Note the qualifying phrase "for releases" on Tanya's statement. If, during release testing, a regression is found on ARM compared to 2.9 results, it is not required by process to be considered a release blocker. That does not mean features can or should be enabled which knowingly break ARM. That's an entirely different situation. -Jim On Oct 8, 2011, at 9:59 AM, Rotem,

Hello, I'm trying to evaluate the performance improvement of instruction scheduling on one of the inorder ARM processor, I was looking for ARM simulator and I found two (Simplescalar/ARM and SimIt-ARM) The code generated using llvm-2.9 and llvm-gcc and gcc 3.2. I used these command : $ llvm-gcc -O3 -o test1.bc -c --emit-llvm test1.c $ llc -O3 -o test1.s -march=arm test1.bc -mcpu=strongarm110

Hi, I want to explorer affection of compiler on low power. For the project background, I tend to process this work via LLVM, rather than GCC. And the Target is ARM. For this purpose, clang(3.2) + arm-gcc + simplescalar-arm(and panalyzer) seems to be a good choice. But I encounter several problems in the processing of setup the environment. ---------------------------------- 1. Firstly, arm

Hi Tanya, The new type-legalization mode (-promote-elements) which enables vector-select in LLVM (and a nice perf boost for several workloads), is currently disabled because of a _single_ bug in the ARM codegen which makes a few tests fail. If ARM is not a supported target, can I mark these tests as 'XFAIL' and enable vector-select support in LLVM ? Thanks, Nadav -----Original

Hi, It goes without saying that I +1 this. Cheers, James -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Raja Venkateswaran Sent: 11 October 2011 17:46 To: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] LLC ARM Backend maintainer I am very interested in seeing a qualification plan for ARM given that it is a widely used