Displaying 20 results from an estimated 7000 matches similar to: "[LLVMdev] Adding Cortext-M3 support"
2009 Dec 01
0
[LLVMdev] thumb2 has divide instructions
I'm working with a Cortex-M3 core which is v7-M profile, and it has udiv and sdiv.
bagel
Jim Grosbach wrote:
> Hello,
>
> As I understand it, the divide instructions are only available on the
> v7-R profile of the v7 architecture. Is that incorrect?
>
> -Jim
2009 Dec 01
4
[LLVMdev] thumb2 has divide instructions
The thumb2 instructions include unsigned and signed divide.
Attached are a patch and test routine.
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2013 Oct 11
3
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi,
I am trying to cross compile code for ARM Cortex m0, m3, and m4.
For m0, I use:
-target armv6--eabi -mcpu=cortex-m0
That seems to work. For m3 and m4, I use the following which does not work
(fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode):
-target armv7m--eabi -mcpu=cortex-m3
and
-target armv7em--eabi -mcpu=cortex-m4
Who can help me with the
2012 Jul 18
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 18 July 2012 14:33, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> but I still haven't figure out how to build for cortex-m3
>
> clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c
-march should have done the trick.
You can also try -mcpu=cortex-m3,
or try -ccc-host-triple armv7m-none-gnueabi (or -eabi),
and possibly
2012 Jul 22
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Sun, Jul 22, 2012 at 9:42 PM, Anton Korobeynikov
<anton at korobeynikov.info> wrote:
>> Any suggestions?
> Try to specify CPU explicitly.
Already did.
clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple
thumbv7m-none-gnueabi testReference.cpp -c -mcpu=cortex-m3
fatal error: error in backend: CPU: 'cortex-m3' does not support ARM
mode execution!
S.
2012 Jul 22
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
> clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple
> thumbv7m-none-gnueabi testReference.cpp -c -mcpu=cortex-m3
> fatal error: error in backend: CPU: 'cortex-m3' does not support ARM
> mode execution!
Ok, and what's about -mthumb then?
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2009 Nov 24
0
[LLVMdev] arm cortex-m3
Looks OK to me, but I don't have any Cortex-M3 docs to confirm the
choice of v7-A without NEON.
deep
On Sun, Nov 22, 2009 at 9:47 PM, Bagel <bagel99 at gmail.com> wrote:
> Here is a one-line patch to support the cortex-m3.
> For those who plan the features for ARM, the new cortex-m0 implements only a
> subset of the Thumb2 instructions. I still have yet to see a document that
2012 Jul 18
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
Hi there,
I'm trying to switch from GCC to llvm (clang++) for cross-compiling
a firmware of mine for a stm32 (ARM cortex-m3).
After looking in the documentation and a bit of googling here is what
I did (in case someone else in the future is having the same problem)
cd llvm
git clone http://llvm.org/git/llvm.git
cd llvm/tools
git clone http://llvm.org/git/clang.git
cd llvm/projects
git
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 3:52 PM, Renato Golin <rengolin at systemcall.org> wrote:
> On 18 July 2012 14:33, salvatore benedetto
> <salvatore.benedetto at gmail.com> wrote:
>> but I still haven't figure out how to build for cortex-m3
>>
>> clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c
>
> -march should have done
2017 Nov 29
3
RFC: Adding 'no-overflow' keyword to 'sdiv'\'udiv' instructions
Introduction:
We would like to add new keyword to 'sdiv'\'udiv' instructions i.e. 'no-overflow'.
This is the updated solution devised in the discussion: http://lists.llvm.org/pipermail/llvm-dev/2017-October/118257.html
The proposed keywords:
"nof" stands for 'no-overflow'
Syntax:
<result> = sdiv nof <ty> <op1>,
2013 Oct 12
0
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi Jan,
For Cortex-M0, you should probably use the armv6m string in the target
triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb
won't be necessary.
Amara
On 11 October 2013 19:23, Jan Hoogerbrugge <
jan.hoogerbrugge at biface-tools.com> wrote:
> Hi,
>
> I am trying to cross compile code for ARM Cortex m0, m3, and m4.
>
> For m0, I use:
>
>
2009 Nov 22
2
[LLVMdev] arm cortex-m3
Here is a one-line patch to support the cortex-m3.
For those who plan the features for ARM, the new cortex-m0 implements
only a subset of the Thumb2 instructions. I still have yet to see a
document that details what's in the subset.
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2012 Jul 28
2
[LLVMdev] Cross-compiling for cortex-m3: how do I get ride of -ccc-gcc-name ?
Hi there,
I'm using clang to cross compile for cortex-m3. I eventually managed to
do so with
clang++ -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple
thumbv7m-none-gnueabi source.cpp -c -mcpu=cortex-m3
I would like to understand what -ccc-gcc-name does exactly and how
can I get ride of it?
>From what I understand, it's needed by the driver in order to find the binutils
for
2012 Jul 18
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
Hi there,
I'm trying to switch from GCC to llvm (clang++) for cross-compiling
a firmware of mine for a stm32 (ARM cortex-m3).
After looking in the documentation and a bit of googling here is what
I did (in case someone else in the future is having the same problem)
cd llvm
git clone http://llvm.org/git/llvm.git
cd llvm/tools
git clone http://llvm.org/git/clang.git
cd llvm/projects
git
2017 Mar 29
2
sdiv in array subscript
Hi llvm-dev,
Looks like currently ScalarEvolution will give up if there is a sdiv in
array subscript, e.g.
int i;
A[i * 64 / 2]
in this case ScalarEvolution will just return an unknown for (i * 64 / 2).
For this case, InstCombine will do the jobs, but in general, is there a
pass to deal with the sdiv here? like replace sdiv by udiv based on the
range of "i"?
Thanks
Hongbin
2009 Oct 22
2
[LLVMdev] arm cortex-m3
Now that there is good thumb2 support in the ARM backend, would someone
please add "cortex-m3" to the "-march" list for the ARM backend. This
should produce pure thumb2 only code. At some point, when the subsets
are public, "cortex-m1" and "cortex-m0" should also be added.
thanks,
bagel
2011 Oct 31
1
Can CELT / libopus on a ARM cortex M3 or M4 (fast enough ?)
Hello everyone,
For a private project I would like to make a new Internet Intercom
device (for my kids and me).
At the moment I use a separate DSP with Ogg/Vorbis (VS1053) but I like
a challenge ;-)
Is a eg. ST32F10x (cortex m3) or a new ST32F40x (cortex m4) powerful
enough to do encoding and decoding ?
Any existing projects to learn from?
Thanks for your time,
Edwin van den Oetelaar
2012 Jul 23
2
[LLVMdev] Setting up a cross-compiler for cortex-m3
On 23 July 2012 17:03, Chris Cadwallader <ccadwallader at arxan.com> wrote:
> On Darwin, if -march is armv7 clang's driver will assume you want thumb2 unless you also give it -mno-thumb but that is irrelevant with mcpu=cortex-m3.
I think that Thumb2 should be the default for v7 on any system, not
just Darwin. Maybe some ARM folk can comment on this...
--
cheers,
--renato
2012 Jul 23
0
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Darwin, if -march is armv7 clang's driver will assume you want thumb2 unless you also give it -mno-thumb but that is irrelevant with mcpu=cortex-m3.
I agree its a mess.
-Chris
On Jul 22, 2012, at 4:37 PM, Renato Golin wrote:
> On 22 July 2012 20:42, Anton Korobeynikov <anton at korobeynikov.info> wrote:
>>> Any suggestions?
>> Try to specify CPU explicitly.
>
2012 Jul 22
3
[LLVMdev] Setting up a cross-compiler for cortex-m3
On Wed, Jul 18, 2012 at 6:08 PM, salvatore benedetto
<salvatore.benedetto at gmail.com> wrote:
> On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote:
>> On 18 July 2012 15:46, salvatore benedetto
>> <salvatore.benedetto at gmail.com> wrote:
>>> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c
>>>