similar to: [LLVMdev] X86 Target instruction definitions

Displaying 20 results from an estimated 600 matches similar to: "[LLVMdev] X86 Target instruction definitions"

2010 May 19
1
[LLVMdev] Scheduled Instructions go missing
All, I'm working on a new scheduler. I have a basic block for which my scheduler generates bad code. The C code looks like int j, *p; if ((j = *p++) != 0) {...} My scheduler emits (x86, AT&T) mov p, %rax mov (%rax), %rax mov %rax, j addq $0x04, p je ... Notice there is no test instruction. The default list scheduler generates mov p, %rax mov (%rax), %rax mov %rax, j addq $0x04,
2010 Feb 04
1
[LLVMdev] Instruction Itineraries
All, I am working on a scheduler for X86 and would like to include instruction latencies. It appears that this information is gathered from instruction itineraries, but that there isn't an itinerary for X86. I also can't seem to find documentation on how to add this for X86. Any pointers would be helpfull. Aran -------------- next part -------------- A non-text attachment was
2010 Feb 13
1
[LLVMdev] llvm-gcc 4.2
All, I'm trying to build llvm-gcc 4.2 from svn (as of about a week ago). I'm getting: ../../llvm-gcc-4.2/libcpp/expr.c: In function 'num_negate': ../../llvm-gcc-4.2/libcpp/expr.c:1114: internal compiler error: Segmentation fault Please submit a full bug report, with preprocessed source if appropriate. I would like to do some debugging, but I don't see where
2010 May 07
1
[LLVMdev] Missuse of xmm register on X86-64
All, I've been working on a new scheduler and have somehow affected register selection. My problem is that an xmm register is being used as an index expression. Specifically, addss (%xmm1,%rax,4), %xmm0 I like the idea of a floating-point index, but, like the assembler, I don't know what that means. Any suggestions on where I should look for a solution to my problem?
2001 Feb 06
2
SCO 5.0.5 (i686-pc-sco3.2v5.0.5), scp and the -n option
Ok, using openssh-SNAP-20010126.tar.gz, two versions of the server both compiled with the configure commands as below, one with USE_PIPES defined and one without. This is on SCO OpenServer 5.0.5 (using SCO dev environment, SCO make, etc.) The client is always linux, openssh 2.3.0p1. export CCFLAGS='-L/usr/local/lib -I/usr/local/include' ./configure --sysconfdir=/etc/ssh
2004 May 15
2
Subject: Re: X100P Ireland Red Alarm
Hi, I suspected that I the analogue phone should have got a pass through signal when the power was off to the server, unfortunately it doesn't. I kept asking digium support about that but they didn't give me an answer. The problem is how do I identify whether the X100P is incompatibel with the network or faulty without possibly wasting another USD100??? Aaron On Sat, 2004-05-15, Eric
2002 Mar 12
3
error compiling openssh-3.1p1 under SCO OpenServer 5.0.5
Trying to compile openssh-3.1p1 on SCO using: export CCFLAGS='-L/usr/local/lib -I/usr/local/include' ./configure --sysconfdir=/etc/ssh --with-rsh=/usr/bin/rcmd --exec-prefix=/usr OpenSSH has been configured with the following options: User binaries: /usr/bin System binaries: /usr/sbin Configuration files: /etc/ssh Askpass
2004 May 16
4
X100P Ireland Red Alarm (AR Tarzi)
Ahhh this could be my problem! I just checked which wires on the RJ11 cable had a voltage across them and it was the yellow and green (3 & 4?). From what someone posted the other day it's supposed to be Bumble Bee and Christmas Tree. I did have to get a technician out to fix my line when it was first installed because it was dead. Maybe he wired it up incorrectly or maybe they just do it
2004 Jun 14
2
International Talking Clocks
Hi, Does anyone know of a list of internationally accessible PSTN talking clocks? I find talkjing clocks a good way to test the call quality to a particular country. There are a quite a few available in the US but the only other two countries I have found numbers for are the UK and Sweden. Other countries obviously have them but they generally don't seem accessible from international
2014 Mar 18
4
[LLVMdev] TableGen docs
Hi folks, It took a while, but I finally have some bandwidth to look at this. I've been reading the two existing TableGen documents: http://llvm.org/docs/TableGenFundamentals.html http://llvm.org/docs/TableGen/LangRef.html the first is linked from the index, but LangRef is not (though it has some remains in the metadata). I'm wondering what's the relationship between them two. My
2004 Oct 02
2
Billing Applications - When does the bill start??
Hi, I have been having a look at the code for asteriskprepaid and it appears as if the billing time starts when the Dial command is called. Is this correct? Does the caller get billed for the dialling time and the call time or just the call time? Although going off some comercial calling cards I have used I think they start billing when you begin thinking about the call. Thanks, Aaron
2001 Jun 13
1
2.9p1 SCO OS 5.0.5 server and Linux client hang on exit when using X11 forwarding and protocol 2
When I run this command: ssh -1 -v -n -l root njdb1b /usr/bin/X11/xterm -sb -sl 1000 -T njdb1b -e find /etc An xterm appears on my screen, the contents of /etc scroll by and then ssh exits. When I invoke the same command with the -2 option, the xterm appears (and disappears) but ssh never exits. netstat says the (ssh) connection is still established but the xterm is no longer
2004 Jul 17
4
E100P and Colt Telecom (Europe)
Hi, Has anyone connected * to a Colt E1 line in Europe? If so could you send me the zaptel.conf and zapata.conf. Thanks, Aaron __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages! http://promotions.yahoo.com/new_mail
2005 May 06
2
[LLVMdev] initialize 'dag' variable and interpret asmstring in tablegen .td file
llvm/lib/Target/X86/X86InstrInfo.td: class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string AsmStr> : Instruction { .... dag OperandList = ops; string AsmString = AsmStr; } def MOV32mi : Ii32<0xC7, MRM0m, (ops i32mem:$dst, i32imm:$src), "mov{l} {$src, $dst|$dst, $src}">; I cannot find any document on initializing the
2018 Feb 28
0
Missed optimization - spill/load generated instead of reg-to-reg move (and two other questions)
On 02/27/2018 10:21 AM, Alex Wang via llvm-dev wrote: > Hello all! > > I was looking through the results of disassembling a heavily-used > short function > in the program I'm working on, and ended up wondering why LLVM was > generating > that assembly and what changes would be necessary to improve the code. > I asked > on #llvm, but it seems that the people with
2012 Aug 06
2
[LLVMdev] Tablegen foreach
I'm trying to find examples of the foreach pattern being used in tablegen files. The problem I am trying to solve is to simplify the amount of tablegen code I have to produce because each operand of an instruction can be a register or a literal. So for binary, we have 4 instructions, ternary, 8, and quaternary 16 combinations. Instead of writing all the combinations out, I'd like to use
2005 Apr 24
4
[LLVMdev] trig language-like code generator generator
i'd like to know if there is any plan or existing work to add a Aho's trig language like code generator generator? "...If you are starting a new port, we recommend that you write the instruction selector using the SelectionDAG infrastructure." any other things i should know before i write one? thank you.
2012 Aug 06
2
[LLVMdev] Tablegen foreach
That is what I currently have, I'm trying to simplify them even further since my multiclass file is enormous because of the amount of combinations. I have things like this: multiclass instmcRegImm<...> { def rr: inst<...>; def ri: inst<...>; def ir: inst<...>; def ii: inst<...>; } multiclass instmc<...> { defm i8 : instmcRegImm<...>; ^-- repeat for 15
2004 Jun 23
4
Future WinCE IP Phone
Hi, Found a nice little video about a prototype phone from broadcom currently sitting in Microsoft WinCE lab. The video is at: http://channel9.msdn.com The video in question is an interview with Mike Hall titled "Windows CE and Windows Embedded Lab Tour". The clip dealing with the VOIP phone is right at the start so you don't need to watch the whole thing (although there is some
2018 Feb 27
2
Missed optimization - spill/load generated instead of reg-to-reg move (and two other questions)
Hello all! I was looking through the results of disassembling a heavily-used short function in the program I'm working on, and ended up wondering why LLVM was generating that assembly and what changes would be necessary to improve the code. I asked on #llvm, but it seems that the people with the necessary expertise weren't around. Here is a condensed version of the code: