similar to: [LLVMdev] [patch] MicroBlaze Backend 2nd Rev.

On Jan 29, 2010, at 9:42 AM, Wesley Peck wrote: > I have been working on a LLVM backend for the MicroBlaze soft-processor: > http://www.xilinx.com/tools/microblaze.htm > http://en.wikipedia.org/wiki/MicroBlaze Very Cool! > Attached is the initial MicroBlaze patch. It does the following: > 1. Adds mblaze as a target in configure and configure.ac > 2. Adds mblaze specific

I have been working on a LLVM backend for the MicroBlaze soft-processor: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze Attached is the initial MicroBlaze patch. It does the following: 1. Adds mblaze as a target in configure and configure.ac 2. Adds mblaze specific intrinsics in include/llvm/IntrinsicsMBlaze.td and include/llvm/Intrinsics.td 3. Adds mblaze

On Jan 30, 2010, at 6:49 AM, Anton Korobeynikov wrote: >> Your patch looks very clean. Some comments: > Heh, Jakob was faster :) I have taken care of everything Jakob mentioned except the extra test cases. I will get to these as soon as I can. > >> - I think you have some literal tabs in your instruction descriptions. > The tabs can be seen in some other places as well.

conmfigure does not accept mblaze nor mblaze-elf as target. checking target system type... Invalid configuration `mblaze': machine `mblaze' not recognized configure: error: /bin/bash ../../spare/llvm/autoconf/config.sub mblaze failed However with microblaze it proceeds fine. But when i try to use clang i get: clang: error: 'microblaze-unknown-none': unable to pass LLVM bit-code

> Your patch looks very clean. Some comments: Heh, Jakob was faster :) > - I think you have some literal tabs in your instruction descriptions. The tabs can be seen in some other places as well. Also, there is a "mix" of coding conventions in the files. It will be really nice to use only one :) > - Your tests are nice, but you could use some more of them. I would recommend

Hi Fivos, LLVM refers to the target as "mblaze" for -target. -Jim On Jun 26, 2012, at 8:42 AM, Fivos <fivosz at gmail.com> wrote: > Hello, > > i am trying to create a LLVM stack to cross compile c code targeting the > xilinx microblaze. > > I built LLVM configured with target=microblaze however cland doesn't > like it. When i try to emit llvm code

Hi guys, I'm new here. I want to write a backend for a microblaze clone, aemb. ( http://www.aeste.my/aemb). I already copy the existing Mblaze target and rename it into aemb and it work exactly as Mblaze, for now. My plan after this is to modify it according to my aemb core. The difference between aemb and MBlaze is that aemb support *two threads*. Any advise or guide where should I dig into

Hello, i am trying to create a LLVM stack to cross compile c code targeting the xilinx microblaze. I built LLVM configured with target=microblaze however cland doesn't like it. When i try to emit llvm code i get the following error: unknown target triple 'microblaze-unknown-none', please use -triple or -arch How should i configure my LLVM stack and then how should i run the tools

I have been working on a LLVM backend for the MicroBlaze (http://en.wikipedia.org/wiki/MicroBlaze ) soft-processor. At this point the backend is partially functional but by no means complete. I was curious as to wether the LLVM developers would prefer to merge the backend into the main tree now and then accept patches on the backend until it was fully functional or if they prefer to wait

Is it kosher to include vim mode line comments inside of LLVM source files? I would like to do this inside of the MicroBlaze backend to ensure that tabs are expanded into exactly two spaces. I see that right now the following files have these vim mode line comments: include/llvm/ADT/SetVector.h lib/Archive/ArchiveInternals.h lib/Linker/LinkModules.cpp lib/Transforms/IPO/DeadTypeElimination.cpp

On Dec 14, 2010, at 3:46 PM, Richard Pennington wrote: > Notice that the label $BB0_1 is missing. If I disable filling in the > branch delay slots, I get: Is this with the latest SVN HEAD version of LLVM or some other version? The delay slot filler and many other things have been updated for the Microblaze backend. In particular, the commit r120095 for the MBlaze backend fixed some issues

I think you should wait until it becomes a problem. Xilink is actively hiring for LLVM people so maybe it will get some use again soon. I get at least one email a day from their head hunters. http://en.wikipedia.org/wiki/MicroBlaze On 02/05/2013 01:02 PM, Chandler Carruth wrote: > > > > On Tue, Feb 5, 2013 at 12:52 PM, Chandler Carruth <chandlerc at gmail.com >

On 02/05/2013 03:58 PM, Chandler Carruth wrote: > On Tue, Feb 5, 2013 at 3:50 PM, Preston Briggs <preston.briggs at gmail.com > <mailto:preston.briggs at gmail.com>> wrote: > > The MBlaze backend seems to be essentially unmaintained since > 2011. The maintainer (Wesley Peck who is BCC'ed) seems to have > vanished, and in fact all emails to

Hi jeff! Any news? On Feb 9, 2013 1:53 AM, "Jeff Fifield" <fifield at mtnhigh.net> wrote: > Hi, > > I just saw this thread. I work on llvm at Xilinx but I do not work on > microblaze. > > I will check to see if there is any interest here at Xilinx to contribute > resources to the maintenance of this backend. > > Thanks, > Jeff > > > > On

On 17 January 2011 10:30, Richard Pennington <rich at pennware.com> wrote: > * It is currently based on a fairly recent version of LLVM/clang: r122956. This is great. I've noticed that you've made some fixes or additions that haven't made it upstream yet, such as the Microblaze parameter fix in rev 2337 (CCed Wesley Peck as he seems to have done a lot of work on the MBlaze

Hi all, I'm trying to create a new backend for a processor, and I start with modifying the existing backends like MIPS and Microblaze. I have a problem when I try to add a register class in the Target's register description, it looks like this: def IGPRegs : RegisterClass<"MBlaze", [v8i16], 128, [PR0, PR1, PR2, PR3]>; // PR0 - PR3 are registers defined before I want to

Hi, I just saw this thread. I work on llvm at Xilinx but I do not work on microblaze. I will check to see if there is any interest here at Xilinx to contribute resources to the maintenance of this backend. Thanks, Jeff On Tue, Feb 5, 2013 at 7:38 PM, Rogelio Serrano <rogelio.serrano at gmail.com>wrote: > > On Feb 6, 2013 4:52 AM, "Chandler Carruth" <chandlerc at

>> I don't think my backend is modified enough from the MBlaze backend that is >> in the release to be causing this error. I am however looking through the >> various files of the backend to try to find where the calling convention >> might be causing problems with f32 data types. > Form the backtrace it seems like you haven't defined how to return f32 > stuff

Hi, i'm working on a microblaze port extremely similar to microblaze that only has data hazards. The advice given to look at PPC and ARM is poor because neither of them check for data dependencies and are entirely complicated and different. The port has a 5 stage pipeline where the result of instruction can only be used at stage 3 and 5 only whereas load and store instructions require 4

Okay, I've done a lot more testing and I now have a .bc file that compiles for x86, sparc, mips but refuses to compile for the mblaze and powerPC backends because of the calling convention. Is there anyone that would know how to fix the microblaze calling convention or point me in the right direction on how to fix it? The lines in the .bc that I believe to be causing the problem are the