similar to: [LLVMdev] newbie qustion: how to generate machine code for target thumb?

Displaying 20 results from an estimated 11000 matches similar to: "[LLVMdev] newbie qustion: how to generate machine code for target thumb?"

2009 Nov 04
0
[LLVMdev] newbie qustion: how to generate machine code for target thumb?
Hi Heyu Zhu, > I want to generate machine code for target thumb, so run > with bit code test.bc > > llc -march thumb test.bc -filetype obj -o test.o > > It doesn't generate test.o but show a message: > > "target doesn't support generation of this file type!" writing object code directly is not supported yet (though it is being worked on), so for
2009 Nov 05
1
[LLVMdev] newbie qustion: how to generate machine code for target thumb?
Hi Duncan, Is it to say llvm-2.5 has no assembler and linker for target thumb and llvm-2.5 can only generate assembler file for the time being? Thanks 2009/11/4, Duncan Sands <baldrick at free.fr>: > > Hi Heyu Zhu, > > I want to generate machine code for target thumb, so run >> with bit code test.bc >> llc -march thumb test.bc -filetype obj -o test.o >>
2010 Jan 04
5
[LLVMdev] How to bind a register variable with a given general purpose register?
Hi everyone, There are 16 GPRs in my RISC, but in fact GPR13 is read-only and connected to output of an A/D converter. It would be very convenient if i could bind a register variable with GPR13. Because i am a newbie i don't know how my llvm backend can support that. I plan to implement it as below. A. first declare a global variable in c-code int ADC asm("GPR13"); B. If
2009 Oct 20
3
[LLVMdev] Problem when build LLVM
According to your description i should not use the system libstdc++ and i need to specify the OTHER compiler libstdc++. But i don't where the OTHER compiler libstdc++ is. Is the OTHER compiler libstdc++ contained in llvm-2.5.tar.gz? if not where can i get it? 2009/10/20, Duncan Sands <baldrick at free.fr>: > > Hi Heyu Zhu, > > Then then the error is: >>
2010 Feb 03
2
[LLVMdev] Does mips backend support variable arguments in release version(llvm-2.6)?
Hi everyone, It seems variable arguments is not support by mips backend in llvm-2.6. int func(int i, ...) { return 0; } llvm-gcc func.c -emit-llvm -c -O3 -o func.bc llc func.bc -relocation-model=static -march=mips -O0 -o func.s Command llc fails: llc:SelectionDAGBuilder.cpp:6440:void llvm::SelectionDAGISel::LowerArguments( llvm::BasicBlock):Assertion 'Invals.size() ==
2009 Oct 20
3
[LLVMdev] Problem when build LLVM
Hi, When i make LLVM with llvm-2.5.tar.gz an error occurs. The step is below tar -zxvf llvm-2.5.tar.gz cd llvm-2.5-tar.gz make ENABLE_OPTIMIZED=1 Then then the error is: /tools/IUS611/tools/lib/libgcc_s.so.1: version `GCC_4.2.0' not found (required by /usr/lib/libstdc++.so.6) What shall i do to avoid it? I am a newbie, maybe it's a foolish question Regards -------------- next
2009 Dec 18
2
[LLVMdev] Questions of instruction target description of MSP430
Hi everyone, I am puzzled by several instruction defines in MSP430. 1 def MOV16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src), "mov.w\t{$src, $dst}", [ ]>; Because it's an empty dag pattern[ ], by what does instuction selector select intruction 'MOV16rr'? 2 let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects =
2010 Feb 03
0
[LLVMdev] Does mips backend support variable arguments in release version(llvm-2.6)?
Hi, On Wed, Feb 3, 2010 at 3:57 AM, Heyu Zhu <zhu.heyu at gmail.com> wrote: > Hi everyone, > > It seems variable arguments is not support by mips backend in llvm-2.6. > > int func(int i, ...) { >   return 0; > } > > llvm-gcc    func.c -emit-llvm -c  -O3   -o func.bc > llc    func.bc -relocation-model=static  -march=mips -O0  -o func.s > > Command llc
2005 Mar 30
1
Cox model qustion in R
Dear all, I have a beginner's R question for coxph() and survfit(). I have a data set with survival time (no censoring) and treatment indicator(0/1). I did something like fit<-coxph( Surv(t)~treat, method="breslow",data=data) > fit Call: coxph(formula = Surv(t) ~ treat, data = data, method = "breslow") coef exp(coef) se(coef) z p treat -1.96
2010 Jan 28
1
[LLVMdev] question when -march=mips
Hi everyone The c code is like below extern int function_0(int, int); int main(){ return function_0(8, 9); } I compile it as below llvm-gcc main.c -emit-llvm -c -O3 -o main.bc llc main.bc -relocation-model=static -march=mips -O0 -o main.s It seems no argument is provided to function_0 ... addiu $sp, $sp, -8 sw $ra, 0($sp) jal function_0
2009 Dec 19
0
[LLVMdev] Questions of instruction target description of MSP430
Hi, 1. This instruction is not selected automatically by the instruction selector. The instruction combine / select stages insert registercopies, and they are expanded later on by the copyRegToReg() function provided by the MSP430InstrInfo to this MOV16rr. 2. ReMaterializable means there is no need to find a way to preserve the value in a register : the instruction can be just be reissued
2009 Oct 21
2
[LLVMdev] Problem when build llvm-gcc using llvm-gcc4.2-2.5.source.tar.gz
Hi, The gcc version in my system is 3.4.6 During make display error message and stop cc1plus:error: unrecognzied command line option -Wno-variadic-macros Must i update gcc to version 4.2.0 or above to resolve the problem? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:
2009 Dec 29
2
[LLVMdev] Question to use inline assemble in X86
Hi everyone, I try to add an instruction to x86. The instruction is a multiply-add instruction MULADD A, B, C; //A = A + B * C. I use the instruction by inline assemble as below int x, y, z; ..... .... x = 0; asm("MULADD %0, %1, %2":"=r"(x):"0"(x), "r"(y), "r"(z)); ..... .... The backend does allocate registers %edx, %edi, %esi for x,y, z
2009 Oct 20
0
[LLVMdev] Problem when build LLVM
Hi Heyu Zhu, > Then then the error is: > > /tools/IUS611/tools/lib/libgcc_s.so.1: version `GCC_4.2.0' not found > (required by /usr/lib/libstdc++.so.6) you can get this if you compile C++ code using a different compiler to your system compiler. Based on the error message, your system compiler is gcc-4.2 and the other compiler is probably gcc-4.3 or later. What has happened
2009 Oct 20
0
[LLVMdev] Problem when build LLVM
Hi Heyu Zhu, > According to your description i should not use the system libstdc++ and > i need to > specify the OTHER compiler libstdc++. But i don't where the OTHER compiler > libstdc++ is. > Is the OTHER compiler libstdc++ contained in llvm-2.5.tar.gz? if not > where can i get it? this has nothing to do with llvm, you would have the same problem with any C++ code that
2009 Oct 21
0
[LLVMdev] Problem when build llvm-gcc using llvm-gcc4.2-2.5.source.tar.gz
On Oct 20, 2009, at 8:29 PM, Heyu Zhu wrote: > Hi, > > The gcc version in my system is 3.4.6 > During make display error message and stop > > cc1plus:error: unrecognzied command line option -Wno-variadic-macros > > Must i update gcc to version 4.2.0 or above to resolve the problem? That is a sign that your native GCC is not new enough, upgrading to 4.2 or later should
2009 Dec 29
0
[LLVMdev] Question to use inline assemble in X86
On Dec 29, 2009, at 3:09 AM, Heyu Zhu wrote: > Hi everyone, > > I try to add an instruction to x86. The instruction is a multiply-add instruction > MULADD A, B, C; //A = A + B * C. > I use the instruction by inline assemble as below > > int x, y, z; > ..... .... > x = 0; > asm("MULADD %0, %1, %2":"=r"(x):"0"(x), "r"(y),
2011 May 13
0
[LLVMdev] [Patch] Let MC/ELF generate Thumb/Thumb-2 are properly
Hi Koan, In general, this looks OK to me. Please split the patch into separate pieces, one for each issue you're addressing, though. From your description, it sounds like this should be 4 patches. That way we have a cleaner revision history in svn. -Jim On May 12, 2011, at 10:42 PM, Koan-Sin Tan wrote: > Hi, > > We are trying to use clang as a drop-in replacement for the gcc come
2011 May 13
7
[LLVMdev] [Patch] Let MC/ELF generate Thumb/Thumb-2 are properly
Hi, We are trying to use clang as a drop-in replacement for the gcc come with Android NDK. I found that MC/ELF doesn't not handle Thumb functions properly, e.g., bit 0 of the function name in the .symtab is not set to 1, and some thumb instructions are not generated correctly, e.g., the addresses for tBL/tBLX are not calculated right. With that attached patch, we can compile and run some
2017 Sep 16
3
LLVM mtriple for aarch64-win32-msvc ?
Thanks Martin, I'm generating the code using LLVM (writing llvm::Triple myself and llvm::TargetRegistry::lookupTarget is working), and that's how my bitcode is generated then using LLC to cross-compile that. So using armv7-win32-msvc is getting me a bit closer, but what CPU, raspberry pi 3 is running a Cortext-A53, but when I specify that in -mcpu argument I get this error: > llc.exe