similar to: [LLVMdev] select with vector condition

Forgive me if I'm missing something obvious, but it seems that a number of core instructions—I'm specifically running in to `atomicrmw`, `fence`, and `cmpxchg` at the moment—cannot be constructed from the C bindings, and are therefore also inaccessible to the OCaml bindings. There are opcodes for each of these in the llvm-c/Core.h, but there seems to be no way to construct them. Is there

How soon would I need to submit a patch for this for it to have a comfortable shot at making it into the 3.2 release? On Sep 14, 2012, at 8:05 PM, Eric Christopher <echristo at apple.com> wrote: > > On Sep 14, 2012, at 4:53 PM, Jonathan Ragan-Kelley <jrk at csail.mit.edu> wrote: > >> Is there a reason these should be omitted? > > Not in particular. Things are

I finally got around to adding these. The patch is posted in a pull request on my copy of llvm.git: https://github.com/jrk/llvm/pull/3 and a simple test with OCaml is here: https://gist.github.com/3948460 Feedback welcome. On Sep 14, 2012, at 7:53 PM, Jonathan Ragan-Kelley <jrk at csail.mit.edu> wrote: > Forgive me if I'm missing something obvious, but it seems that a >

What is the current state of the JIT on Windows x64? I have noticed intermittent conversation about past incompatibility due to the calling convention idiosyncrasies, as well as some suggestion from last fall that it was targeted for a fix in the 2.5 timeframe, but see no definitive conclusion. Is this working in 2.5, in trunk, or likely to be in trunk soon?

On Wed, Jun 3, 2009 at 6:29 PM, Jonathan Ragan-Kelley<jrk at csail.mit.edu> wrote: > What is the current state of the JIT on Windows x64? Broken; at the very least, there's http://llvm.org/bugs/show_bug.cgi?id=3739 . -Eli

I can't seem to find reference to intrinsics, beyond the is_intrinsic function. I am building a backend which needs to perform some target-specific code-generation (for SSE, AVX, and NEON), and intrinsics are the standard path in the C++ API.

On Fri, May 13, 2011 at 5:18 PM, Jonathan Ragan-Kelley <jrk at csail.mit.edu>wrote: > I can't seem to find reference to intrinsics, beyond the is_intrinsic > function. > > I am building a backend which needs to perform some target-specific > code-generation (for SSE, AVX, and NEON), and intrinsics are the > standard path in the C++ API. > What happens if you just

On Sep 14, 2012, at 4:53 PM, Jonathan Ragan-Kelley <jrk at csail.mit.edu> wrote: > Is there a reason these should be omitted? Not in particular. Things are added to the C API as needed and usually on demand. -eric

Thanks, all. I didn’t realize a 7.0 RC was public and changed to 3.4—I will go down that road for now, though I’ll probably also look into integrating variants of the SPIR converter in the future. Another possibility is to skip libnvvm altogether and use LLVM's NVPTX target.  This is of course harder since you have to configure the passes yourself instead of just calling a few C

I'm looking for assistance with pci-passthrough on CentOS 6.2. I've installed libvirt version: 0.9.4, package: 23.el6_2.8 from yum. I have a windows XP client setup via virt-manager which boots and runs fine until I attempt to assign a PCI device to it. The error log reads: -----------------/var/log/libvirt/qemu/SageTv.log---------------- 2012-06-02 22:55:07.801: starting up LC_ALL=C

Hi Is there any Altivec optimized libVorbis implementation source code out there ? The only thing I'v found is that message: http://lists.xiph.org/pipermail/vorbis-dev/2003-October/007835.html but the link is dead, so the source code is lost (forever ?). I need to decode from 10 to 30 ogg files on my PS3 on the fly (files are already in memory, so I'm not I/O bound) and do something

Hello, Could I please ask you for help? I opened a case in GCC Bugzilla and got reply that -fpie have to be used to get it compiled. Now it fails for me with: x86_64-pc-linux-gnu-gcc -o ssh ssh.o readconf.o clientloop.o sshtty.o sshconnect.o sshconnect1.o sshconnect2.o mux.o roaming_common.o roaming_client.o -L. -Lopenbsd-compat/ -flto=4 -fuse-linker-plugin -Wl,--as-needed -Wl,-O2 -Wl,-flto -O2

Looking further during down time at the dev meeting today, it actually seems that PTX atom.* and red.* intrinsics map extremely naturally onto the LLVM atomicrmw and cmpxchg instructions. The biggest issue is that a subset of things expressible with these LLVM instructions do not trivially map to PTX, and the range of things naturally supported depends on the features of a given target. With

This question is specifically motivated by the practical constraints of NVVM, but I don't know anywhere better to ask (hopefully, e.g., @jholewinski is still following), and I believe it concerns general LLVM issues: NVIDIA's libNVVM is built on LLVM 3.2. This means its bitcode and LL text parsers are from that generation. It's interface calls for adding modules as either bitcode

From what I can tell, the truncstore paths all fail instruction selection in the current PTX backend. This is easy to work around for int types >= 16 bits by setting the truncstore action to expand in PTXISelLowering.cpp, but this cannot handle i8 values, since the PTX backend has no register representation for i8s. As a result of all this, it is not possible to store to i8 pointers at all.

On Mon, Oct 31, 2011 at 3:15 PM, Jonathan Ragan-Kelley <jrk at csail.mit.edu>wrote: > I notice that there is not currently any intrinsic support for atomics in > the PTX backend. Is this on the roadmap? Should it be as easy to add as it > seems (plumbing through just like the thread ID instructions, &c.)? The > obvious difference is that these ops have side effects. > It

I notice that there is not currently any intrinsic support for atomics in the PTX backend. Is this on the roadmap? Should it be as easy to add as it seems (plumbing through just like the thread ID instructions, &c.)? The obvious difference is that these ops have side effects. -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type:

Hi Nadav, great work, thanks a lot! I did not have the time to migrate our OpenCL driver to the latest trunk yet, but I followed your commits and tried out some small tests which worked as expected :). The last thing missing for us now is AVX support in the JIT, but that is a different issue. However, there is one thing I do not fully understand: what if somebody actually wants a vector of

Loads (on ptx64) with an sext of a computed index operand fail instruction selection: LLVM ERROR: Cannot select: 0x7ff01401c210: i64,ch = load 0x10580e820, 0x7ff01401b510, 0x7ff01401b910<LD4[%memref1], sext from i32> [ID=8] 0x7ff01401b510: i64 = PTXISD::LOAD_PARAM 0x10580e820, 0x7ff01401b410 [ORD=2] [ID=6] 0x7ff01401b910: i64 = undef [ORD=4] [ID=3] This is for code of the form: %ptr

Hello, I try to convert a LDIF contain some users to a LDIF with samba3 sh?ma. But, the convertion on my computers don't work ! Attached files : a ldif with one user (users.ldif) and a LDIF file after convertion (users3.ldif) Can anyone help me ? RedHat 8 Samba 3.1 beta1 -------------- next part -------------- dn: ou=users, dc=toto,dc=be ou:: dXNlcnMN description::