similar to: [LLVMdev] wrong debug information for library functions

Suppose I have fun.h as: static void fun() { int a =10; } Now I have two files foo.c and goo.c as foo.c : #include "fun.h" void foo() { fun(); } goo.c: #include "fun.h" void goo() { fun(); } I get .bc files for foo.c and foo.bc through clang. Now I run llvm-ld with -disable-opt for foo.bc and goo.bc. In the resulting .bc files, one of the

On Mon, Jun 8, 2009 at 3:25 AM, <Vasudev.Negi at microchip.com> wrote: > > I get .bc files for foo.c and foo.bc through clang. Now I run llvm-ld > with -disable-opt for foo.bc and goo.bc. In the resulting .bc files, one > of the two functions fun, is renamed to fun<number>. There are two > llvm.dbg.subprogram descriptors created for the two fun functions. Both > have

Thanks for the info regarding DebugLoc field. Another related question that I have is regarding debug info for local variables. With -fast option, ISD::DECLARE nodes are created in DAG for debug info of local variables. I am planning to custom handle these nodes, get the required info from llvm.dbg.variable global address and emit it in ISel. But without -fast option ISD::DECLARE nodes

I need to generate line number debug information for PIC16 target. PIC16 does not support dwarf format. It supports coff format. So I need to custom handle the STOPPOINT nodes. Without -fast option the STOPPOINT nodes are not created in dag because of the below check in SelectionDAGBuild.cpp if (Fast) DAG.setRoot(DAG.getDbgStopPoint(getRoot(), If I give -fast option then the Fast

On Apr 7, 2009, at 9:52 PMPDT, vasudev wrote: > Thanks for the info regarding DebugLoc field. Another related > question > that I have is regarding debug info for local variables. With -fast > option, ISD::DECLARE nodes are created in DAG for debug info of local > variables. I am planning to custom handle these nodes, get the > required > info from llvm.dbg.variable

Hi list, I downloaded and tried to install Mongrel (latest stable version) from the -win32 gem. Platform is Win2K. It said it needed daemons so got and installed that. Then it said it needed cgi_multipart_eol_fix (I think that was the name, not at my machine now, can confirm later and repost if needed). Googled for that but couldn''t find it. (Don''t have net connectivitity for a

Can we help in local variable debug info work. Dale Johannesen wrote: > On Apr 7, 2009, at 9:52 PMPDT, vasudev wrote: > > >> Thanks for the info regarding DebugLoc field. Another related >> question >> that I have is regarding debug info for local variables. With -fast >> option, ISD::DECLARE nodes are created in DAG for debug info of local >>

On Apr 5, 2009, at 11:54 PMPDT, vasudev wrote: > I need to generate line number debug information for PIC16 target. > PIC16 does not support dwarf format. It supports coff format. So I > need > to custom handle the STOPPOINT nodes. Without -fast option the > STOPPOINT > nodes are not created in dag because of the below check in > SelectionDAGBuild.cpp > if (Fast)

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hello to all I been working on this from past few days. .I am talking about separate migration for each one of the multiple database that a single rails application has connection with.I know that rails can work with multiple databases but what with migrations for e.g my main rails application has a connection to two databases 1> main_development 2> secondary_development Know suppose i

Hi, I want to emit the debug information in assembly through assembler directives. Also I don't want to emit debug information in sections (like Dwarf). Instead the debug information will be interspersed with the assembly. However in LLVM, debug info (e.g. stoppoint) is read and made part of the DAG only when DwarfWriter is registered. How can I emit the debug information in assembly

Sachin, On Feb 24, 2009, at 12:27 AM, Sachin.Punyani at microchip.com wrote: > Hi, > > I want to emit the debug information in assembly through assembler > directives. Also I don’t want to emit debug information in sections > (like Dwarf). Instead the debug information will be interspersed > with the assembly. However in LLVM, debug info (e.g. stoppoint) is > read

Dear sirs, I'm trying to build an Opus library for an embedded application to run on a Microchip PIC32MX processor and I get a lot of errors in compilation time. My question is, what should be the minimum files and options needed to have such building, having in mind that only the very basic functionality in fixed point arithmetic is needed? Looking forward to your answer. Kind

Hi, I want to emit the debug information in assembly through assembler directives. Also I don't want to emit debug information in sections (like Dwarf). Instead the debug information will be interspersed with the assembly. However in LLVM, debug info (e.g. stoppoint) is read and made part of the DAG only when DwarfWriter is registered. How can I emit the debug information in assembly

Thank you Chris, That is great news... So his modifications are in llvm-2.2? How has Christopher tested them? Are there attributes or intrinsics that I can also use? A. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Chris Lattner Sent: Tuesday, January 29, 2008 9:23 PM To: LLVM Developers Mailing List Subject: Re: [LLVMdev] C

I need to perform call graph analysis (after all modules are merged) to find which function calls which, and depending on the attributes that each function has and what functions call it, I may need to clone it and modify some of calls to that function to call the cloned function. Currently we are doing this in few acrobatic moves that span from an llvm-ld pass (to do call graph analysis) all the

I am trying to verify the generated DAG after converting from llvm to DAG, however I'm not sure if this is correct or not. Here is the situation: In order to get LLVM to lower to 8-bit I have to define only 8-bit registers and the pointer size also to be 8-bit. Doing so, the attached DAG is generated for a load:i16. I have problem understanding this DAG in two places: 1)As you can see the

Dear dev team, I have following question: Microchip is offering IT'S speex library here: http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en023610for it's microcontrollers. Is this a derivate of your sources? If it is, then you should do some checking because I could not find any references to yor credits. Best regards, Marjan --------------

Hi, Apparently, there is no explicit support for ISRs in the llvm framework. I could not find a matching attribute that can be used to mark a function as an ISR, which codegen and optimizer can use accordingly. ISRs aren't called explicity from any function, so currently the optimizer deletes them. We are planning to introduce a new "interrupt" attribute (to be modeled similiar to

So does that mean that LLVM can't lower automatically to 8-bit values? I tried defining 8-bit pointers in the subtarget using "p:8:8:8" but it asserts at line 566 of TargetData.cpp in the default case of TargetData::getIntPtrType() Is it difficult to add 8-bit support? A. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On