similar to: [LLVMdev] Move instruction

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] Move instruction"

2008 Nov 15
0
[LLVMdev] Move instruction
On Fri, Nov 14, 2008 at 2:13 PM, Karhu, Abhinav R <akarhu3 at gatech.edu> wrote: > > Hi all, > Can anybody tell me how to generate a mov instruction in llvm. I found out there is a MemMove Inst but I dont think that is what I want. > I want to bypass a load instruction. So i need to generate a mov instruction which will help me remove the redundant load. At the LLVM IL level,
2008 Nov 15
1
[LLVMdev] Move instruction
Hi Eli, I want to do redundant load elimination. A simple example for that would be load (a1) , r1; --- --- --- load (a2) , r2; Now if a1 and a2 are alias of each other and the value stored in a1 and a2 remains the same then I can say that the second load is redundant. I can replace the second load with these instructions mov r0 r1; mov r0 r2; and remove the load instruction. This is the thing
2008 Nov 16
2
[LLVMdev] Move instruction
Hi owen, Can you please elaborate as to what should I do? Find all the instruction which have r2 in it and replace all of them with r1 and then remove the load instruction? Thanks Abhinav ----- Original Message ----- From: "Owen Anderson" <resistor at mac.com> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> Sent: Friday, November 14, 2008 11:22:32 PM
2008 Nov 16
0
[LLVMdev] Move instruction
r2->replaceAllUsesWith(r1); r2->eraseFromParent(); LLVM makes it easy! ;-) --Owen On Nov 15, 2008, at 11:02 PM, Karhu, Abhinav R wrote: > Hi owen, > Can you please elaborate as to what should I do? Find all the > instruction which have r2 in it and replace all of them with r1 and > then remove the load instruction? > Thanks > Abhinav > ----- Original Message
2008 Sep 29
2
[LLVMdev] Problem running program with LLVM JIT
Hey all, I compiled the code using both the -c and -S options. I can get the human readable IR but I still cannot run it using lli. The output of the IR looks like this. Can some of the information tell me about why the program is not running. ; ModuleID = 'Hel.c' target datalayout = "e-p:32:32" target endian = little target pointersize = 32 target triple =
2008 Oct 30
3
[LLVMdev] Problem executing code with lli...
Hi all, I am facing new problem with lli now. I am having a sample code in which I am doing malloc for two variables. If I compile the code with normal gcc the program runs without any warning of any sorts. If I compile the program to convert it into a bytecode file and then run it through lli it segfaults and the program aborts. This is the stack trace after execution. lli((anonymous
2008 Sep 29
1
[LLVMdev] Problem running the program
I have compiled the program using the following option. llvm-gcc --emit-llvm Hello.c -o Hel.bc I have used llvm in the past but this sort of problem is new for me. I dont know how to go about it. Thanks for the reply. -- Abhinav Karhu MS Computer Science Georgia Institute of Technology
2008 Oct 26
1
[LLVMdev] Problem executing code with lli...
Hey all, I am getting this weird error which suddenly popped up today. Whenever I am trying to execute a piece of code using lli I get this following error. Error loading program 'sample.bc': Invalid bytecode signature: 464C457F (Vers=0, Pos=4) I dont know what to do..Please reply to this question. Please... -- Abhinav Karhu MS Computer Science Georgia Institute of Technology
2007 Jul 02
2
[LLVMdev] Getting the target information of a branch instruction
I think you can refer to lib/VMCore/AsmWriter.cpp for these things. E.g., You can use 'if(I.isTerminator())' if a instruction 'I' is terminator. You can use 'if (isa<BranchInst>(I))' if a instruction 'I' is 'br' instruction. and so on... Thx, Seung Jae Lee ---- Original message ---- >Date: Mon, 2 Jul 2007 17:15:00 -0400 (EDT) >From: abhi232
2007 Jul 02
2
[LLVMdev] Getting the target information of a branch instruction
Hello all, I am new to the llvm infrastructure so if this question is already resolved please redirect me to that link. I am writing a pass for flow sensitive and context sensitive alias analysis.for that i require the previous and next instruction of all the instructions.Is there an intrinsic that can help me getting the instruction numbers directly because i read at the llvm.org website making
2007 Jul 23
2
[LLVMdev] LHS of an expression
Hi Bill, Thanks a lot for your response.But my problem still remains.The thing is i am having a data type std::vector<Value*> as i am checking for the variables in Store Instructions and Malloc Instructions.For store the case is straightforward as discussed earlier.I want the same Value* variable for malloc inst as well. bcos i cannot have a different set for only instructions. can there be
2007 Jul 02
0
[LLVMdev] Getting the target information of a branch instruction
Thanks a lot for the help guys.. I will try to get the information on these lines... Thank you once again... Will bug you guys after some time now. :) > I think you can refer to lib/VMCore/AsmWriter.cpp for these things. > > E.g., > You can use 'if(I.isTerminator())' if a instruction 'I' is terminator. > You can use 'if (isa<BranchInst>(I))' if a
2008 Sep 28
0
[LLVMdev] Problem with running the program using LLVM
Hey All, I am running into a problem with running the program using LLVM JIT. I get the following error. lli: error loading program 'Hel.bc': Bitcode stream should be a multiple of 4 bytes in length. Hel.bc is the bytecode for my simple HelloWorld program. Please give me some insight into this. Thanks -- Abhinav Karhu MS Computer Science Georgia Institute of Technology
2008 Oct 22
0
[LLVMdev] Alias analysis information using Profile Pass.
Hey all, I am trying to see if we can gather alias analysis information during profiling, similar to block profiling or edge profiling info which can be gathered. Is there some way that can be achieved? A pointer on this topic would be much appreciated. Thanks -- Abhinav Karhu MS Computer Science Georgia Institute of Technology
2008 Oct 25
0
[LLVMdev] trouble generating profile_rt.so
Hey all, I want to run the profile.pl file in the utils folder but I am having trouble running the script because the profile_rt.so file is not generated properly. So in order to generate that I am running make in the /runtime/libprofile. when I do that I get the following message. llvm[0]: Linking Release Lodable Module profile_rt.so llvm[0]: Compiling BasicBlockTracing.c for Release build
2007 Jul 24
0
[LLVMdev] LHS of an expression
On 7/23/07, abhi232 at cc.gatech.edu <abhi232 at cc.gatech.edu> wrote: > Hi Bill, > Thanks a lot for your response.But my problem still remains.The thing is i > am having a data type std::vector<Value*> as i am checking for the > variables in Store Instructions and Malloc Instructions.For store the case > is straightforward as discussed earlier.I want the same Value*
2007 Jul 02
1
[LLVMdev] Getting the target information of a branch instruction
> On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote: >> Hello all, >> I am new to the llvm infrastructure so if this question is already >> resolved please redirect me to that link. >> >> I am writing a pass for flow sensitive and context sensitive alias >> analysis.for that i require the previous and next instruction of all the >> instructions.Is there
2006 Apr 05
1
(Fwd) Re: Reading xyz data from a file and plotting a cont
BTW. I checked help page of contour and maybe it could mention a note about akima package or interp function. Petr ------- Forwarded message follows ------- From: Petr Pikal <petr.pikal at precheza.cz> To: "Abhinav Verma" <abhinav1205 at gmail.com>, r-help at stat.math.ethz.ch Subject: Re: [R] Reading xyz data from a file and plotting a
2007 Jul 02
0
[LLVMdev] Getting the target information of a branch instruction
On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote: > Hello all, > I am new to the llvm infrastructure so if this question is already > resolved please redirect me to that link. > > I am writing a pass for flow sensitive and context sensitive alias > analysis.for that i require the previous and next instruction of all the > instructions.Is there an intrinsic that can help me
2009 Mar 26
2
Providing rough idea about GSoC Project
Hi, My name is Abhinav Chittora Student in Engineering College Bikaner (India) with Information Technology stream. let me introduce first. I am enough good in developing firefox addon so I have choosen the project in which I have to make a firefox addon....(Making Addon to record Voice Comment And stream it to icecast). I want to explain how i am going to implement it.. I want to make a GUI for