similar to: [LLVMdev] Rounding Mode for fptrunc Instruction

Displaying 20 results from an estimated 3000 matches similar to: "[LLVMdev] Rounding Mode for fptrunc Instruction"

2015 Aug 21
2
The semantics of the fptrunc instruction with an example of incorrect optimisation
I've recently been looking at how to implement in LLVM IR the rounding of floating point values when casting using different rounding modes and I've hit some problems. It seems that when casting down floats to less precise types the ``fptrunc`` LLVM IR instruction is used. The LLVM language reference suggests that it just truncates the value (which would be equivalent to rounding towards
2008 Apr 01
3
[LLVMdev] Reference Manual Clarifications 2
The fptrunc instruction states "If the value cannot fit within the destination type, ty2, then the results are undefined." This is fine, but what about other floating-point operations that can overflow? For example, does 'mul double 1.0e300, 1.0e300' produce +infinity or is it undefined? I think LLVM should treat floating-point overflows consistently. On a similar note,
2008 Apr 01
0
[LLVMdev] Reference Manual Clarifications 2
On Mon, 31 Mar 2008, Jon Sargeant wrote: > The fptrunc instruction states "If the value cannot fit within the > destination type, ty2, then the results are undefined." This is fine, but > what about other floating-point operations that can overflow? For example, > does 'mul double 1.0e300, 1.0e300' produce +infinity or is it undefined? It is defined by IEEE to
2008 Mar 31
7
[LLVMdev] Reference Manual Clarifications
Here is a patch containing all but one of the changes. I realized that the remainder/modulo discussion does indeed belongs to the srem instruction. The semantics of urem are obvious and need no further clarification. Best Regards, Jon 1572,1573c1572,1575 < notation (see below). Floating point constants must have a <a < href="#t_floating">floating point</a>
2018 Jan 09
2
[cfe-dev] Why is #pragma STDC FENV_ACCESS not supported?
On 01/08/2018 07:06 PM, Richard Smith via llvm-dev wrote: > On 8 January 2018 at 11:15, Kaylor, Andrew via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > Hi Kevin, > > Thanks for reaching out about this, and thanks especially for > offering to help. I've had some other priorities that have > prevented
2018 Jan 08
4
[cfe-dev] Why is #pragma STDC FENV_ACCESS not supported?
Hi Kevin, Thanks for reaching out about this, and thanks especially for offering to help. I've had some other priorities that have prevented me from making progress on this recently. As far as I know, there is no support at all in clang for handling the FENV_ACCESS pragma. I have a sample patch somewhere that I created to demonstrate how the front end would create the constrained intrinsics
2018 Jan 09
0
[cfe-dev] Why is #pragma STDC FENV_ACCESS not supported?
On 8 January 2018 at 11:15, Kaylor, Andrew via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi Kevin, > > Thanks for reaching out about this, and thanks especially for offering to > help. I've had some other priorities that have prevented me from making > progress on this recently. > > As far as I know, there is no support at all in clang for handling the >
2018 Jan 09
0
[cfe-dev] Why is #pragma STDC FENV_ACCESS not supported?
On 8 Jan 2018 19:50, "Hal Finkel via cfe-dev" <cfe-dev at lists.llvm.org> wrote: On 01/08/2018 07:06 PM, Richard Smith via llvm-dev wrote: On 8 January 2018 at 11:15, Kaylor, Andrew via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi Kevin, > > Thanks for reaching out about this, and thanks especially for offering to > help. I've had some other
2008 Apr 01
1
[LLVMdev] Reference Manual Clarifications
Chris Lattner wrote: > On Mar 31, 2008, at 5:07 PM, Jon Sargeant wrote: > >> Gordon Henriksen wrote: >>> Hi Jon, >>> Please you'll want to submit patches as unified diffs and as >>> attachments. >>> I notice you're using Thunderbird, so I refer you to this tip: >>>
2019 Dec 10
2
TypePromoteFloat loses intermediate rounding operations
For the following C code __fp16 x, y, z, w; void foo() { x = y + z; x = x + w; } clang produces IR that extends each operand to float and then truncates to half before assigning to x. Like this define dso_local void @foo() #0 !dbg !18 { %1 = load half, half* @y, align 2, !dbg !21 %2 = fpext half %1 to float, !dbg !21 %3 = load half, half* @z, align 2, !dbg !22 %4 = fpext half %3 to float, !dbg
2013 Mar 21
0
[LLVMdev] fptrunc and undefined results
Hi, The LangRef says this about fptrunc: "The ‘fptrunc‘ instruction truncates a value from a larger floating point type to a smaller floating point type. If the value cannot fit within the destination type, ty2, then the results are undefined." What does it mean for the value to "fit within the destination type"? For instance, is the value of %Inf = fptrunc double
2019 Dec 10
2
TypePromoteFloat loses intermediate rounding operations
Thanks Eli. I forgot to bring up the strict FP questions which I was working on when I found this. If we're in a strict FP function, do the fp_to_f16/f16_to_fp emitted by promoting load/store/bitcast need to be strict versions of fp_to_f16/f16_to_fp. And if so where do we get the chain, especially for the bitcast case which isn't a chained node. ~Craig On Tue, Dec 10, 2019 at 3:18 PM
2014 Jul 09
6
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
    Thank you Kevin!!!    If I use fptrunc and bitcast realise NEON vcvtt ( I can sure, "fptrunc  double %tmp to float" is right, but "fptrunc float %tmp to half" is wrong). My target platform is MIPS.  The command as following: NEON:            vcvtt.f16.f32 s2, s0 llvm Code: %Vt_2 = load float* %VFP_s0, align 4 %Vt3_1 = fptrunc float %Vt_2 to half %Vt4_1 = bitcast half
2014 Jul 09
4
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
On 07/09/2014 12:41 PM, Matt Arsenault wrote: > On 07/09/2014 03:30 PM, yalong at multicorewareinc.com wrote: >> Thank you Kevin!!! >> If I use fptrunc and bitcast realise NEON vcvtt ( I can sure, >> "fptrunc double %tmp to float" is right, but "fptrunc float %tmp to >> half" is wrong). My target platform is MIPS. The command as following:
2014 Jul 10
2
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
Hi Daniel,    Thank you your replying.     Yes, the problem is about MIPS backend. You give me this message "There is limited support for the <8 x f16> type when MSA (MIPS SIMD Architecture) is enabled but even then scalar half-precision is not currently supported."  Could you give me some official link or some evidence? Thank you very much. Robin yalong at multicorewareinc.com
2014 Jul 14
2
[LLVMdev] RFC: Do we still need @llvm.convert.to.fp16 and the reverse?
On Jul 14, 2014, at 7:23 AM, Tom Stellard <tom at stellard.net> wrote: > On Mon, Jul 14, 2014 at 01:08:54PM +0100, Tim Northover wrote: >> Hi all, >> >> What do people think of doing away with the @llvm.convert.to.fp16 and >> @llvm.convert.from.fp16 intrinsics, in favour of using "half" and >> fpext/fptrunc? [1] >> > > I am in favor
2008 Jun 03
2
[LLVMdev] Truncate float to int?
Newbie question here: what's the best way to truncate a float to a signed int? The fptosi instruction rounds, and the fptrunc instruction simply truncates from a large float type to a smaller float type. Mark
2019 Feb 25
3
Why is there still ineffective code after -o3 optimization?
Hi, I have some IR module from random generation (mostly ineffective instructions). It has a function with void return, and two function arguments where one is a reference. Therefore, I expect every instruction not altering the value at the 2nd arguments address should be ineffective. Here is the function definition (see below for full ll): define void @_Z27entityMainDataInputCallbackdRd(double
2014 Jul 10
2
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
Hi Andrea    Thank you your replying.    I do like your letter. Add following to line to MipsISelLowering.cpp. As your words,   @llvm.convert.to.fp16  can compile successfully. However, the runtime is not right. +  setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand);+  setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); Robin yalong at multicorewareinc.com  From: Andrea Di
2011 Sep 08
1
[LLVMdev] [cfe-dev] Proposal: floating point accuracy metadata (OpenCL related)
On Thu, Sep 08, 2011 at 11:15:06AM -0500, Villmow, Micah wrote: > Peter, > Is there a way to make this flag globally available? Metadata can be fairly expensive to handle at each node when in many cases it is a global flag and not a per operation flag. There are two main reasons why I think we shouldn't go for global flags: 1) It becomes difficult if not impossible to correctly link