similar to: [LLVMdev] delete/creates modules

On Aug 13, 2007, at 9:11 PM, Chris Lattner wrote: > Nope, passes work within a module, they can't create/delete them. So there is no possibility to write a pass to arrange functions and globals in a different than the given way? No way to partition the structure new? I would really like to know how code is generated for heterogeneous architectures like Cell? I thought they use a

On Mon, 13 Aug 2007, nico wrote: > is it possible to implement a pass which creates new modules or > deletes old ones (which kind of pass could do this)? > Perhaps there is already a pass which implements that - but I didn't > found it. Nope, passes work within a module, they can't create/delete them. > BTW: will there be one day the Cell BE slides on the dev-meeting >

Hi, I'm doing some preliminary work to get Clang to compile for PS3 targets. As an intermediate step in that direction, could someone do me the favor of reviewing and submitting the enclosed patch, or giving me feedback on it? Basically, I need to be able to differentiate the triple for a PS3 target. These are the triples currently used in the gcc-based compiler from the PS3 devkit:

Hi Is there any Altivec optimized libVorbis implementation source code out there ? The only thing I'v found is that message: http://lists.xiph.org/pipermail/vorbis-dev/2003-October/007835.html but the link is dead, so the source code is lost (forever ?). I need to decode from 10 to 30 ogg files on my PS3 on the fly (files are already in memory, so I'm not I/O bound) and do something

Hi, I wonder how the initial selection DAG is built in the backends. >From working backends I get: ----8<------- Initial selection DAG: BB#0 'main:' SelectionDAG has 18 nodes: ----8<------- >From my (not working) backend I get: ----8<------- Initial selection DAG: BB#0 'main:' SelectionDAG has 15 nodes: ----8<------- I miss three nodes and I wonder what do I have

Hi, if I want to know how switch instructions are handled in the backend, where do I have to look first? I'm not familiar with the backend framework and I couldn't figure out the interface between the LLVM instruction 'SwitchInst' and whatever there is in the backend. I would be very happy about every hint where I have to look to find the entry point of switch instructions in the

Hi Rantao, perhaps you should use $llvmpath/utils/profile.pl for profiling? It works well. If you don't want to use it, there is at least some code in the script that should help you. BTW: I'm not sure if it is possible to instrument the bitcode with function and basic block code at the same time. But it should work sequential (data in llvmprof.out are accumulated after each run

Hello, My name is Rantao Chen and i am a student at the University of Maryland. I am currently doing some research for a professor to do Basic Block profiling using LLVM. I have set up the environment correctly and built the profile_rt.so shared library, but i am having some problems using the LLVM profiling tools. I run "opt -insert-function-profiling -insert-block-profiling input.bc

On Mon, Feb 27, 2012 at 12:52 PM, Nico <listiges at arcor.de> wrote: > Hi, > > if I want to know how switch instructions are handled in the backend, where do I have to look first? > I'm not familiar with the backend framework and I couldn't figure out the interface between the LLVM instruction 'SwitchInst' and whatever there is in the backend. > > I would be

Hi Eli, Thank you for the quick reply. On Feb 27, 2012, at 10:03 PM, Eli Friedman wrote: > SelectionDAGBuilder::visitSwitch is the general switch lowering... I understand this lowering is target independent and there is no additional target dependent handling of switch instructions - right? Only branches and jump tables are left after this lowering? Kind regards, Nico

Hi, I try to write a new backend. At the moment I run into a compiler error and don't know how I can solve this problem. Like several other targets I have a file 'mybackendTargetInfo.cpp' in the subdirectory 'TargetInfo'. The content of this file is: #include "mybackend.h" #include "llvm/Module.h" #include "llvm/Support/TargetRegistry.h" using

All, I'm needing volunteers to help moderate the sessions of the LLVM Developers' Meeting. All you need to do is introduce the speaker, make sure the speaker stays on time, and run Q&A at the end (run a microphone, select people, etc). Its a pretty easy job, but critical for our meeting to run smoothly. If you are interested in moderating, please send me your top 2 session choices.

hi all, i have integrated SAMBA with active directory and everthing is working . however SAMBA server is accessible with hostname only on local subnet. it is not opening in other subnets and opening with ipaddress. it keeps on asking for password and saying access denied while using net view \\testsamba corp.raju.ad. command any one faced the same problem ?? please help me out. Regards

Jerome: No, there are no plans to JIT to SPU. That's considerably more complicated -- you'd have to figure out when to JIT to the SPU and live with all of the constraints that the SPU imposes (data reformatting, r/w DMA, ensure your code lives in 256K unless you can manage to interface with the virtual I-cache work.) Basically, it's not trivial and it doesn't quite fit into the

Hello > Is there additionnals information to provide to the linker when > compiling llvm on mac os x? Do you have libffi installed somehere? > > > The second question concerns Yellow Dog Distribution(6.2) on CellSPU > processor. Does lli support JIT compilation on CELL? No. As far as I can see, there is no JIT for SPU. -- With best regards, Anton Korobeynikov. Faculty of

Hi, I'm yet working on the LLVM ExecutionEngine portability (2.6 release version) and I get two different problems depending on the platform. The first problem concerns compilation on MacOs X (10.5.5) with an X86 processor, when trying to compile my own project containing the ExecutionEngine class and the linker class. I get links problem with "_ffi_type_sint16",

Hi, attached is a second try for the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions: -in vararg handling, registers are marked to be live, to not confuse the register scavenger -function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the

Thank very much for this answer, so my last question will be: is it possible to use the LLVM JIT on a PS3 with Yellow Dog 6.2 distribution, instead of the LLVM interpreter, by using the PPE as it seems to be similar to 64-bit PowerPC processors? 2009/12/18 Scott Michel <scooter.phd at gmail.com> > Jerome: > > No, there are no plans to JIT to SPU. That's considerably more

I remember a discussion to the effect that using DSA keys in sshd increases the requirement for random bits available on the system... and that this requirement (was it a 128 bit random number per connection?) presents security problems on systems that don't have a decent source of entropy? Am I misinterpreting those discussions? We are having a problem deploying sshd (no prngd) where sshd

I just changed the default register allocator for -O0 builds to the fast allocator. This means that the local register allocator is not used anymore, and since it does more or less the same as the fast allocator, there is no reason to keep it around. I am going to delete it in a week or two. If you are using the local register allocator, please try switching to the fast allocator and report any