Displaying 20 results from an estimated 200 matches similar to: "[LLVMdev] Debug info for conditionally defined variables?"
2008 Jan 12
1
[LLVMdev] Labels
I'm attempting to modify a parser generator to emit LLVM code instead of C.
So far the experience has been trivial, but I am now running into an error
regarding labels that I can't seem to solve.
Situation 1: A label is used immediately after a void function call (l6 in
this case):
<snip>
%tmp26 = load i32* @yybegin, align 4
%tmp27 = load i32* @yyend, align 4
call void
2007 Jul 12
1
[LLVMdev] backend problem with LiveInterval::removeRange
Hi all,
When compiling some programs using the Mips backend
i'm getting this assert message on lib/CodeGen/LiveInterval.cpp:227:
"Range is not entirely in interval!"
I don't know yet if it's something that is missing on the backend code or
why
the range to be removed it outside the interval, does anyone have any clue?
A more detailed output is attached.
The program i tried
2007 Jul 02
1
[LLVMdev] Getting the target information of a branch instruction
> On Mon, 2 Jul 2007 abhi232 at cc.gatech.edu wrote:
>> Hello all,
>> I am new to the llvm infrastructure so if this question is already
>> resolved please redirect me to that link.
>>
>> I am writing a pass for flow sensitive and context sensitive alias
>> analysis.for that i require the previous and next instruction of all the
>> instructions.Is there
2007 Jul 02
0
[LLVMdev] Getting the target information of a branch instruction
Thanks a lot for the help guys..
I will try to get the information on these lines...
Thank you once again...
Will bug you guys after some time now. :)
> I think you can refer to lib/VMCore/AsmWriter.cpp for these things.
>
> E.g.,
> You can use 'if(I.isTerminator())' if a instruction 'I' is terminator.
> You can use 'if (isa<BranchInst>(I))' if a
2007 Jul 02
2
[LLVMdev] Getting the target information of a branch instruction
I think you can refer to lib/VMCore/AsmWriter.cpp for these things.
E.g.,
You can use 'if(I.isTerminator())' if a instruction 'I' is terminator.
You can use 'if (isa<BranchInst>(I))' if a instruction 'I' is 'br' instruction.
and so on...
Thx,
Seung Jae Lee
---- Original message ----
>Date: Mon, 2 Jul 2007 17:15:00 -0400 (EDT)
>From: abhi232
2010 Sep 29
0
[LLVMdev] spilling & xmm register usage
On Sep 29, 2010, at 8:35 AMPDT, Ralf Karrenberg wrote:
> Hello everybody,
>
> I have stumbled upon a test case (the attached module is a slightly
> reduced version) that shows extremely reduced performance on linux
> compared to windows when executed using LLVM's JIT.
>
> We narrowed the problem down to the actual code being generated, the
> source IR on both systems
2014 Mar 03
6
[Bug 2207] New: Potential NULL deference, found using coverity
https://bugzilla.mindrot.org/show_bug.cgi?id=2207
Bug ID: 2207
Summary: Potential NULL deference, found using coverity
Product: Portable OpenSSH
Version: -current
Hardware: Other
OS: FreeBSD
Status: NEW
Severity: enhancement
Priority: P5
Component: sshd
Assignee:
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
2007 Jan 29
2
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
Hello.
I have a problem which is quite basic for array optimization, amd I
wonder whether I am missing something, but I could not
find the LLVM pass that does it.
Consider the following code snippet:
int test()
{
int mat[7][7][7];
int i,j,k,sum=0;
for(i=0;i<7;i++){
for(j=0;j<7;j++){
for(k=0;k<7;k++){
sum+=mat[i][j][k]^mat[i][j][k^1];
}
}
}
return
2008 Jul 02
2
[LLVMdev] Problem while using mem2reg Optimization
Hi,
I am using various LLVM optimization passes and I noticed a strange
behaviour in Mem2Reg Optimization. These pass is used for SSA construction
and basically removed alloca of the corresponding pointers are just used in
load/stores.
I tried the following .ll file
*define i32 @test(i32 %y,i32 %z) {
entry:
%X = alloca i32 ; type of %X is i32*.
%X.0 = add i32 %y ,%z
2011 Aug 31
2
[LLVMdev] How to place call(s) to functions found in other llvm modules ???
Hello Everyone,
I am trying to create two modules in LLVM, where first module contains
the definition of a function, gcd in this example and another module
contains a call to this function. My example is based on the following
tutorial, with a few changes.
http://llvm.org/releases/2.6/docs/tutorial/JITTutorial2.html
When I execute the verifier pass on my modules, it complains that the
2010 Sep 10
1
[LLVMdev] Missing Optimization Opportunities
Hi,
I'm using LLVM 2.7 right now, and I found "opt -std-compile-opts" has
missed some opportunities for optimization:
define void @spa.main() readonly {
entry:
%tmp = load i32* @dst-ip ; <i32> [#uses=3]
%tmp1 = and i32 %tmp, -16777216 ; <i32> [#uses=1]
%tmp2 = icmp eq i32 %tmp1, 167772160 ; <i1> [#uses=2]
2014 Sep 09
3
[LLVMdev] failed folding with constant array with opt -O3
I have the following simplified llvm ir, which basically returns value
based on the first value of a constant array.
----
; ModuleID = 'simple_ir3.txt'
@f.b = constant [1 x i32] [i32 1], align 4 ; constant array with
value 1 at the first element
define void @f(i32* nocapture %l0) {
entry:
%fc_ = alloca [1 x i32]
%f.b.v = load [1 x i32]* @f.b
store [1 x i32] %f.b.v, [1 x
2010 Nov 07
0
[LLVMdev] Hoisting elements of array argument into registers
David Peixotto <dmp <at> rice.edu> writes:
> I am seeing the wf loop get optimized just fine with llvm 2.8 (and almost
as good with head).
I rechecked this and am I actually seeing the same results as you. I think I
must have made a stupid mistake in my tests before - sorry for the noise.
However, I found that we have a phase ordering problem which is preventing us
getting as much
2010 Nov 23
1
[LLVMdev] Unrolling loops into constant-time expressions
Hello,
I've come across another example:
I'm compiling with
clang -S -emit-llvm -std=gnu99 -O3
clang version 2.9 (trunk 118238)
Target: x86_64-unknown-linux-gnu
Thread model: posix
I take the code:
int loops(int x) {
int ret = 0;
for(int i = 0; i < x; i++) {
for(int j = 0; j < x; j++) {
ret += 1;
}
}
return ret;
}
and the
2014 Sep 10
3
[LLVMdev] failed folding with constant array with opt -O3
I came in to an email this morning that said basically the same thing
for the reduced example we were looking at. However, the original IR it
came from (before hand reduction) had the data layout set correctly, so
there's probably still *something* going on. It's just not what I
thought at first. :)
Philip
On 09/10/2014 02:26 AM, Roel Jordans wrote:
> Looking at the -debug
2013 May 31
2
[LLVMdev] Dead Code Elimination and undef values
Hello there,
I'm writing a transformation pass for LLVM, and I hoped to use dce to clean
up the resulting code after my pass. I just have some questions about
LLVM's dce implementation.
Well, my transformation is a function pass, and, after the changes are
made, some instructions are not needed anymore. In order to easily get rid
of those instructions, I'm setting all their uses to
2013 Jun 01
0
[LLVMdev] Dead Code Elimination and undef values
Hi Cristianno,
On 01/06/13 01:49, Cristianno Martins wrote:
> Hello there,
>
> I'm writing a transformation pass for LLVM, and I hoped to use dce to clean up
> the resulting code after my pass. I just have some questions about LLVM's dce
> implementation.
>
> Well, my transformation is a function pass, and, after the changes are made,
> some instructions are not
2011 May 31
2
[LLVMdev] How to identify LLVM version?
Hi, all
I'd like to write a code that can build different codes based on LLVM version.
Like code snippets in the below.
#ifdef __LLVM_29__
PHINode *PN = Builder.CreatePHI (Type::getDoubleTy(getGlobalContext()), 2, "iftmp");
#elif __LLVM_28__
PHINode *PN = Builder.CreatePHI (Type::getDoubleTy(getGlobalContext()), "iftmp");
#else
assert ("wrong
2011 Jul 06
1
[LLVMdev] Confusion with a Use of a getelementptr instruction being a Use of a select instruction instead
Hello,
I'm doing some Def/Use analysis, and I'm hung up on one tricky spot. The BB
in question is attached. Ignore the red.
The issue is that '%13 = load...' instruction does not show up as a Use for
the '%scevgep25' definition, and I feel like it should. Instead, it shows
up as a Use for '%iftmp.55.0 = select...', though Operand(0) for this '%13 =
2017 May 26
2
Moving instructions from source Basic Block to dest Basic Block
Hi,
I have been trying to move some instructions between basic blocks ,
After looking at the API , I found llvm::Instruction::clone() but there
is no result value for this.
For example-
source Basic block :
continuation: ; preds = %else, %then
%iftmp = phi i32 [ 5, %then ], [ 9, %else ]
store i32 %iftmp, i32* %datasize
; 3 instructions below