similar to: [LLVMdev] difference between pattern and dag2dag isels

Chris Lattner wrote: > On Fri, 11 Mar 2005, Morten Ofstad wrote: >> I am trying to make the FP intrinsics (abs, sin, cos, sqrt) I've added >> work with the X86ISelPattern, but I'm having some difficulties >> understanding what needs to be done. > > Cool. Here are a couple of requests: > > 1. I don't think we need an "llvm.abs" intrinsic

On 9/24/07, Evan Cheng <evan.cheng at apple.com> wrote: > I am going to suggest something shocking. :) Since you will end up writing a > bunch of target specific code anyway, you might a well write a target > specific pass that change generic instructions into data register variant > ones when necessary. Hi Evan, wouldn't this generate fairly terrible code if each address

On Sep 22, 2007, at 10:36 AM, Christopher Lamb <christopher.lamb at gmail.com > wrote: > > On Sep 22, 2007, at 4:05 AM, Andreas Fredriksson wrote: > >> On 9/21/07, Christopher Lamb <christopher.lamb at gmail.com> wrote: >> >>> ISel patterns are matched against DAGs before register allocation. >>> So you >>> are correct that ISel

> > You can use a cast, and force one type in the pattern, then use the other > one in a Pat: > > def VGETITEM: > [(set GPR:$rD, (extractelt (v4i32 VR:$rA), GPR:$rB))] > > def: Pat<(extractelt (v4f32 VR:$rA), GPR:$rB)), > (VGETITEM VR:$rA, GPR:$rB)>; > > -Krzysztof > > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora

I cannot understand what does the paragraph mean. Could anyone please elaborate it? http://llvm.cs.uiuc.edu/ChrisLLVM/docs/CodeGenerator.html#selectiondag_legalize "Instead of using a Legalize pass, we could require that every target-specific selector supports and expands every operator and type even if they are not supported and may require many instructions to implement (in fact, this is

Hmm, okay. Then what's the problem being reported here? I'm not sure what I'm supposed to do with "LLVM ERROR: Cannot select: t1: i16 = Constant<127>".BTW, the function is: ; ModuleID = 'return.c' source_filename = "return.c" target datalayout = "E-m:e-p:16:16:16-i1:16:16-i8:16:16-i16:16:16-i32:16:16-i64:16:16-S16-n16" target triple =

On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > >> Our architecture has 1-bit boolean predicate registers. >> >> I've defined comparison >> >> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>;

On 1 Oct 2010, at 13:35, Bill Wendling wrote: > On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > >> Bill Wendling wrote: >>> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >>> >>>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>>> >>>>> Our architecture has 1-bit boolean predicate registers. >>>>>

So there's a DAG that looks like this in the debug output: Selecting: t3: ch,glue = CopyToReg t0, Register:i16 %R5, Constant:i16<127> In the instruction selection phase, what pattern would that match? I've constructed this so far: (??? REG16:$dst, i16imm:$src) but the problem is, I can't determine what to use as ???. There is an ISD::CopyToReg enum value, but I don't

On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > Our architecture has 1-bit boolean predicate registers. > > I've defined comparison > > > def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>; > > > > > But then I end up having the following bug: > >

On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > Bill Wendling wrote: >> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >> >>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>> >>>> Our architecture has 1-bit boolean predicate registers. >>>> >>>> I've defined comparison >>>> >>>> def

Hi All, I'm working on various cleanups and simplifications to the asmprinters. One thing that is driving me nuts is that the asmprinters currently "reverse engineer" a lot of information when printing an operand that isel had when it created it. I'm specifically talking about all the suffixes generated by isel, like $non_lazy_ptr, @TLSGD, @NTPOFF, (%rip) etc. These

Well, that's the thing: I thought that was CopyToReg. I don't know what the name of the node is to load one value into a register, so I don't know how to construct such a pattern. On Sat, Nov 4, 2017 at 9:23 PM Craig Topper <craig.topper at gmail.com> wrote: > Do you have a pattern for loading an i16 immediate into a 16-bit register? > > ~Craig > > On Sat, Nov 4,

What's a reliable way to prefer one patterns over another? I have two patterns with different predicates. Pattern A has a very general predicate to catch a wide variety of store instructions. Pattern B has a narrower predicate meant to catch very specific store instructions that would also satisfy the predicate for Pattern A. We used to match Pattern B just fine but after changing .td

On Monday 06 April 2009 13:31, David Greene wrote: > What's a reliable way to prefer one patterns over another? I have two > patterns with different predicates. Pattern A has a very general predicate > to catch a wide variety of store instructions. Pattern B has a narrower > predicate meant to catch very specific store instructions that would also > satisfy the predicate for

David, Would you mind documenting what you did with AddedComplexity for the 'less fortunate' on the wiki? Thanks, Justin. On Mon, Apr 6, 2009 at 9:47 PM, David Greene <dag at cray.com> wrote: > On Monday 06 April 2009 13:31, David Greene wrote: > > What's a reliable way to prefer one patterns over another? I have two > > patterns with different predicates.

On Tuesday 07 April 2009 01:20, someguy wrote: > David, > Would you mind documenting what you did with AddedComplexity for the 'less > fortunate' on the wiki? Yep. Will do. Hmm...is there a link to the Wiki on the main page? I can't find it. -Dave

Not yet. http://wiki.llvm.org On Tue, Apr 7, 2009 at 6:06 PM, David Greene <dag at cray.com> wrote: > On Tuesday 07 April 2009 01:20, someguy wrote: > > David, > > Would you mind documenting what you did with AddedComplexity for the > 'less > > fortunate' on the wiki? > > Yep. Will do. Hmm...is there a link to the Wiki on the main page? I >

On Apr 7, 2009, at 9:03 AM, someguy wrote: > Not yet. > > http://wiki.llvm.org I added a link to the sidebar. -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090407/bd8eb148/attachment.html>

Thanks Chris! Can we put it in the IRC channel's topic as well? On Tue, Apr 7, 2009 at 7:35 PM, Chris Lattner <clattner at apple.com> wrote: > > On Apr 7, 2009, at 9:03 AM, someguy wrote: > > Not yet. > http://wiki.llvm.org > > > I added a link to the sidebar. > > -Chris > > > _______________________________________________ > LLVM Developers