Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] misc. patches"
2004 Dec 14
0
[LLVMdev] misc. patches
Morten,
The leaks.patch file introduced a static destructor ordering problem
which lead to garbled output. The comment above those lines of code
indicates why it needs to be the way it is. My bad for committing it in
the first place. Please be careful in the future.
Reid.
On Mon, 2004-12-13 at 05:30, Morten Ofstad wrote:
> Hi,
>
> here are some minor patches that for various reasons
2017 Jan 16
4
[RFC 0/2] Propose a new pointer trait.
Hi,
I'm part of an engineering team doing research on persistent memory support and
we have stumbled upon an interesting problem. The issue is, we would like to be
able to use the standard library containers in a persistent memory context
(think NVDIMM-N). What I mean is that you allocate a container from said
memory, use it like you normally would. After the application terminates,
expectedly
2009 Sep 30
2
C++ parser for doc.get_data() result.
Xapians!
Did anybody wrote and would like to share a routines that parse result
from doc.get_data() into some key and pair values in C++ ?
Code:
Xapian::Document doc = i.get_document();
string data = doc.get_data();
mymap = parse_result(data);
As you know the data string contain all the data within the document
delimited by "=" sign and "\n" new line and needs to be parse
2018 Mar 22
2
ARM Backend BuildMI operand issues
Hello everyone,
I'm working on a MachineFunctionPass that inserts a list of instructions
into an Module so a later Pass can work on them.
To do so I load a dummy .ll file created from a main stub, create the
needed function stubs (ModulePass), insert Blocks and create
instructions using BuildMI.
I started with branch instructions:
const TargetMachine &TM = MF.getTarget();
2009 Apr 03
6
[LLVMdev] Patch: MSIL backend global pointers initialization
Anton Korobeynikov wrote:
> Hi, Artur
>
>
>> I'm working on that backend now, so probably I'll send some more patches
>> soon. I'd be grateful if you could give me some suggestions how to add
>> some test for that backend to the test-suite. On Linux the output code
>> could be run on Mono and compared with outputs for other backends but
>>
2010 Jan 18
5
[LLVMdev] [patch] Union Types - work in progress
On Jan 16, 2010, at 11:15 AM, Talin wrote:
> OK here's the patch for real this time :)
>
> On Fri, Jan 15, 2010 at 4:36 PM, Talin <viridia at gmail.com> wrote:
> Here's a work in progress of the union patch. Note that the test
> "union.ll" does not work, so you probably don't want to check this
> in as is. However, I'd be interested in any
2018 Mar 22
0
ARM Backend BuildMI operand issues
On 03/22/2018 09:29 AM, Julius Hiller via llvm-dev wrote:
> Hello everyone,
>
> I'm working on a MachineFunctionPass that inserts a list of instructions into an Module so a later Pass can work on them.
> To do so I load a dummy .ll file created from a main stub, create the needed function stubs (ModulePass), insert Blocks and create instructions using BuildMI.
> I started with
2008 Dec 31
2
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
Bill Wendling wrote:
> On Dec 30, 2008, at 4:51 PM, srs wrote:
>
>
>> 2. There seems to be an issue in ScheduleDAGSDNodes.h when in debug
>> mode. The problem is the evaluation of "&SUnits[0];" which ASSERT's in
>> VC++'s vector[] implementation (when _HAS_ITERATOR_DEBUGGING is on).
>>
>> As a work-around, I commented out the debug
2018 Mar 23
1
ARM Backend BuildMI operand issues
Thank you for your help Tom
you are totally right with the registers but the command you suggest
also doesn't work.
After some research I found the following thread on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2017-February/110086.html
With your help and the information about the condition codes I was able
to resolve the error:
BuildMI(BB, BB.end(), DL,
2018 Jun 30
2
Using BuildMI to insert Intel MPX instruction BNDCU failed
Hello everyone, I'm a newbie of llvm. I'm trying to insert Intel MPX
instruction BNDCU with BuildMI. I add my machinefunctionpass
at addPreEmitPass2.
Here is the code of insertion:
BuildMI(MBB, MI, DL, TII->get(X86::BNDCU64rr)).addReg(X86::BND2,
RegState::Define).addReg(X86::R10);
And here is to stack track when I compiler program with modified llc:
2013 Oct 01
2
[LLVMdev] JITMemoryManager
Mesa (http://www.mesa3d.org/) uses LLVM to compile shaders. These are
typically small bits of code (~10KB) and one application can use many
of them. Mesa creates an ExecutionEngine with a default JIT memory
manager for each shader it compiles, and keeps the engine around as
long as the shader code is needed. This results in memory waste of
~1MB for each shader. Half the overhead is in the
2013 Nov 23
2
[LLVMdev] Builds failing on lldb with the following for well over a week on a new build folder
Linking CXX executable ../../../../bin/lldb
Scanning dependencies of target lldb-platform
[100%] Building CXX object
tools/lldb/tools/lldb-platform/CMakeFiles/lldb-platform.dir/lldb-platform.cpp.o
*../../../../lib/liblldb.so.3.5: undefined reference to
`llvm::SmallPtrSetImpl::SmallPtrSetImpl(void const**, unsigned int,
llvm::SmallPtrSetImpl&&)'**
**clang: error: linker command
2013 Oct 02
3
[LLVMdev] JITMemoryManager
I'll try to find out, or get someone to explain, why Mesa selects
MCJIT with LLVM 3.1 only and JIT for other LLVM versions. I'm not
keen to code a fourth attempt (1: copy JIT code, 2: delegating manger,
3: derive from DefaultJITMemoryManager, 4: copy MCJIT code) but I'll
try copying code with MCJIT. Is that the usual route for people who
want to delete all LLVM engines, etc. while
2016 May 29
2
problems with objects larger than PTRDIFF_MAX
On 2016-05-20 19:58, David Majnemer via llvm-dev wrote:
> I've come across this issue before and came to the following conclusion:
> - We are not obligated to support objects that large, C11 5.2.4.1/1 only
> requires that we support objects of size 65535!
Right, the standard doesn't require it. But I guess you don't imply that
it's fine for clang to silently miscompile
2010 Jan 28
0
[LLVMdev] [patch] Union Types - work in progress
OK here's a new version of the patch - and the unions.ll test actually
passes :)
On Mon, Jan 18, 2010 at 1:40 PM, Chris Lattner <clattner at apple.com> wrote:
>
> On Jan 16, 2010, at 11:15 AM, Talin wrote:
>
> OK here's the patch for real this time :)
>>
>> On Fri, Jan 15, 2010 at 4:36 PM, Talin <viridia at gmail.com> wrote:
>> Here's a work
2008 Dec 31
0
[LLVMdev] Win32 JIT issue + bug in ScheduleDAGSNodes.h?
On Dec 31, 2008, at 5:57 AM, srs wrote:
> Bill Wendling wrote:
>> On Dec 30, 2008, at 4:51 PM, srs wrote:
>>
>>
>>> 2. There seems to be an issue in ScheduleDAGSDNodes.h when in debug
>>> mode. The problem is the evaluation of "&SUnits[0];" which
>>> ASSERT's in
>>> VC++'s vector[] implementation (when
2020 Jul 24
4
[libnbd PATCH 0/3] Expose server block size constraints
Necessary when writing a client that wants to avoid unnecessary EINVAL
errors from sending unaligned requests.
At some point, we may want to add synchronous convenience API wrappers
that do request splitting or read-modify-write to obey server
constraints while still appearing to the library client as accepting
any possible request. But such a wrapper should only be synchronous
and not copied to
2013 Oct 02
0
[LLVMdev] JITMemoryManager
Hi Frank,
The project really needs to be looking to move away from the old JIT and to MCJIT. LLVM is actively working to kill the old JIT. It’s already unmaintained. MCJIT is the way forward. Can you elaborate on what’s blocking its adoption for Mesa?
-Jim
On Oct 1, 2013, at 10:44 AM, Frank Henigman <fjhenigman at google.com> wrote:
> Mesa (http://www.mesa3d.org/) uses LLVM to compile
2013 Nov 25
0
[LLVMdev] Builds failing on lldb with the following for well over a week on a new build folder
Looks like your lldb is being compiled in C++11 mode and your llvm
wasn't perhaps?
-eric
On Sat, Nov 23, 2013 at 12:57 AM, Marc Driftmeyer <mjd at reanimality.com> wrote:
> Linking CXX executable ../../../../bin/lldb
> Scanning dependencies of target lldb-platform
> [100%] Building CXX object
> tools/lldb/tools/lldb-platform/CMakeFiles/lldb-platform.dir/lldb-platform.cpp.o
2018 Jun 24
2
MachineFunction Instructions Pass using Segment Registers
The size suffix thing is a weird quirk in our assembler I should look into
fixing. Instructions in at&t syntax usually have a size suffix that is
often optional
For example:
add %ax, %bx
and
addw %ax, %bx
Are equivalent because the register name indicates the size.
but for an instruction like this
addw $1, (%ax)
There is nothing to infer the size from so an explicit suffix is