similar to: [LLVMdev] How to write a new backend?

Hello, I'm considering a possibility of writing an llvm backend for my research uses. Unfortunately, I can't find much information on how do to it. I more or less understood now the C backend is implemented, but for real backend I'd need at least register allocation. I beleive there's already register allocator in LLVM and I would like to reuse it if possible. The question is

the proposed architecture (chris) doesn't seem to attack the phase ordering problem. through having independent instruction selection, instruction scheduling, and register allocation phases faciliate a modular design, but i believe the phase-coupled code generator generator high quality code on many architectures. espeically in the embedded system like a media/dsp processors with very limited

On Mon, 25 Apr 2005, Tzu-Chien Chiu wrote: > http://portal.acm.org/citation.cfm?id=75700 Oh, tWig. :) Yes, tree pattern matching is exactly the direction we are heading. We are slowly making the code generators more and more automatically generated as time goes on. The SelectionDAG infrastructure is mean to support exactly this (perform Tree or DAG pattern matching on the optimized DAG

On Mon, 25 Apr 2005, Tzu-Chien Chiu wrote: > i'd like to know what progress you guys have made (not on cvs?). Everything is in CVS. Noone is currently working on automating the pattern matching generator process yet. Before doing that, there are a few changes we want to make to the SelectionDAG interface. In particular, right now, the selection process basically works like this: #1.

i'd like to know what progress you guys have made (not on cvs?). i don't want to re-invent wheels, and the existing many code generator generators. i am evaluating many possbile code generation libraries. at present i give me preferrence to "Prop": http://www.cs.nyu.edu/leunga/www/prop.html and it's portable too. are there any other good library you could recommend?

On Apr 30, 2006, at 10:42 PM, Chris Lattner wrote: > On Sat, 29 Apr 2006, Fernando Magno Quintao Pereira wrote: >> I want to implement the register allocation algorithm described in >> the >> paper "Register Allocation via Coloring of Chordal Graphs, >> APLAS'05" in >> LLVM. This is a graph coloring algorithm that can find an optimal >>

On Sat, 29 Apr 2006, Fernando Magno Quintao Pereira wrote: > I want to implement the register allocation algorithm described in the > paper "Register Allocation via Coloring of Chordal Graphs, APLAS'05" in > LLVM. This is a graph coloring algorithm that can find an optimal coloring > of the interference graph in most of the cases. I've downloaded LLVM last > week,

On Mon, 11 Jul 2005 shding at mtu.edu wrote: > I have extended the IR for adding flag. But I just want this flag to > pass through the backend machine code. I know there're several passes > like register relocation, schedualing, etc. But I think I just miss the > part which is used to "parser" the LLVM IR to machine code > instructions. The part of the code

June Status Update ------------------ Hi everyone, Since the last status update, we've had a lot of progress on various fronts. In particular, we passed the 15,000th commit to the llvm-commits list, we have some great new features and documentation, new people using LLVM, and (strangely enough) the MachineBasicBlock class seems to have received a lot of love. At this point, I'm

Hi, In the directory of lib/CodeGen/SelectionDAG, I cann't find SelectionDAGISel.cpp. I only have DAGBuilder.cpp and SelectionDAG.cpp. I don't know why. My edtion is 1.4. Is it because of the edtion difference? Thanks! > On Mon, 11 Jul 2005 shding at mtu.edu wrote: >> I have extended the IR for adding flag. But I just want this flag to >> pass through the backend

On Fri, 20 May 2005, Segher Boessenkool wrote: >> a new instruction selection framework, > > Hi Chris, > > Any documentation on that insn selection framework? Or just > point me to the source files ;-) There is not enough, but a high level overview is here: http://llvm.cs.uiuc.edu/docs/CodeGenerator.html#instselect The best way is to learn by example, e.g. take a look at

Hi everyone, This Fall has been busy, busy, busy. In addition to the usual LLVM hacking, our developers have been moving all over the country, starting classes, ending internships, getting married, and traveling the world. Despite all of the non-LLVM fun we've been having, we've managed to get some work done, too. :) Here is my traditional distillation of llvm-commits: New High-Level

On Nov 1, 2011, at 11:44 AM, Tony Linthicum wrote: > Hello all, > > We would like to contribute a new backend for Qualcomm's Hexagon > processor. We will actively maintain the port once it is accepted. > Hexagon is a VLIW core that is used principally in modem and low power > audio applications in Qualcomm's chip sets. > > We have a patch for both llvm and for

On 11/1/2011 3:46 PM, Chris Lattner wrote: > > If relevant, I'd suggest splitting it up as: > > 1. Changes to LLVM code outside your target directory. > 2. Your new target directory. > 3. Clang patches. > > As others have pointed out, you really do need some basic regression tests to make sure that the backend is working. Also, make sure to update this: >

Thanks for all replies, they have been very helpful! Note: Sorry, i forgot to group reply.... ---------- Forwarded message ---------- From: Duncan Sands <baldrick at free.fr> Date: 2011/9/4 Subject: Re: [LLVMdev] Some questions on SelectionDAG To: Zakk <zakk0610 at gmail.com> Hi Zak, Therefore, after the LegalizeType phase, maybe SelectionDAG have > unsupported > type

http://portal.acm.org/citation.cfm?id=75700 On 4/25/05, Chris Lattner <sabre at nondot.org> wrote: > On Sun, 24 Apr 2005, Tzu-Chien Chiu wrote: > > i'd like to know if there is any plan or existing work to add a Aho's > > trig language like code generator generator? > > Trig is a code generator generator? Is there any documentation for it > available

<ccing llvmdev> On Thu, 23 Mar 2006, Eric van Riet Paap wrote: > I am experimenting with the LLVM JIT as a future codegenerator for the PyPy > JIT. The basics are working which I am extremely happy with! Great! > Maybe you could answer a few questions? (I'm away until monday) > > * Is there a way to show the generated code? Yes, pass -print-machineinstrs into the LLVM

On Sunday 22 February 2009 23:18:25 Chris Lattner wrote: > Have you seen: > http://llvm.org/docs/WritingAnLLVMBackend.html I have, and it's certainly helpful. Since the Kalescope tutorial is so amazingly easy to work through that it makes me jealous for a similar tutorial on the backend. But I'm definitely not complaining. =) > If you're targeting a stack machine, I'd

On Thu, 27 Sep 2007, Zack Rusin wrote: > as some of you may know we're in process of experimenting with LLVM in > Gallium3D (Mesa's new driver model), where LLVM would be used both in the > software only (by just JIT executing shaders) and hardware (drivers will > implement LLVM code-generators) cases. Yep, nifty! > That is graphics hardware (basically every single

Hi, I think it's an awesome idea to make sure all names are logical. It is an essential feature of a good API to have logical naming :) > I really dislike that all the files and classes in the MC library > start with MC. This is c++, not c :( On a similar note, all the classes in clang/CodeGen are prefixed with CG or even CodeGen, could those be renamed as well? And speaking of the