similar to: LLVM Social - Beijing: May 19th, 2018

Hi Chris, Thanks for your response! Wu Wei made this happen! and he is organizing LLVM social in Shanghai, Hang Zhou and Shen Zhen. I hope one day there is LLVM developer meeting in China :) 在 2018年05月29日 14:13, Chris Lattner 写道: > This is really great, thank you for getting this off the ground! > > -Chris > > >> On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at

在 2018年05月29日 14:58, mayuyu.io 写道: > Any hint on the date of LLVM Social ShangHai? Wu Wei scheduled July 1th http://hellollvm.org/ > > Zhang > >> 在 2018年5月29日，14:22，Leslie Zhai via llvm-dev <llvm-dev at lists.llvm.org> 写道： >> >> Hi Chris, >> >> Thanks for your response! >> >> Wu Wei made this happen! and he is organizing LLVM social in

Any hint on the date of LLVM Social ShangHai? Zhang > 在 2018年5月29日，14:22，Leslie Zhai via llvm-dev <llvm-dev at lists.llvm.org> 写道： > > Hi Chris, > > Thanks for your response! > > Wu Wei made this happen! and he is organizing LLVM social in Shanghai, Hang Zhou and Shen Zhen. I hope one day there is LLVM developer meeting in China :) > > >> 在 2018年05月29日

This is really great, thank you for getting this off the ground! -Chris > On May 28, 2018, at 9:42 PM, Leslie Zhai <lesliezhai at llvm.org.cn> wrote: > > Hi LLVM developers, > > My sincere thanks will goto Wu Wei for his great organization! > > I shared a topic " to introduce Loongson's contribution to LLVM and GCC toolchain. > > Slide:

Hope live broadcast ! <br/><br/>Thanks,<br/>yaoxiao 在 2018-05-29 15:02:30，"Leslie Zhai via llvm-dev" <llvm-dev at lists.llvm.org> 写道： > > >在 2018年05月29日 14:58, mayuyu.io 写道: >> Any hint on the date of LLVM Social ShangHai? >Wu Wei scheduled July 1th http://hellollvm.org/ > > >> >> Zhang >> >>> 在

Hi Wei, > The first (maybe) LLVM social in Beijing will happen on May 19th, 2018. Congratulations! -- Regards, Leslie Zhai

Hi GCC and LLVM developers, I am learning Register Allocation algorithms and I am clear that: * Unlimited VirtReg (pseudo) -> limited or fixed or alias[1] PhysReg (hard) * Memory (20 - 100 cycles) is expensive than Register (1 cycle), but it has to spill code when PhysReg is unavailable * Folding spill code into instructions, handling register coallescing, splitting live ranges, doing

Hi Matthias, Thanks for your hint! It is just for learning and practicing for me, just like migrate DragonEgg http://lists.llvm.org/pipermail/llvm-dev/2017-September/117201.html the motivating is for learning from GCC and LLVM developers. 在 2017年12月19日 10:07, Matthias Braun 写道: > > >> On Dec 18, 2017, at 9:52 AM, Leslie Zhai via llvm-dev >> <llvm-dev at lists.llvm.org

Hi Leslie, On 20 December 2017 at 10:51, Leslie Zhai via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Sorry, I am apprentice of lowRISC, and meet new bug when porting GlobalISel > to RISCV target > https://github.com/xiangzhai/llvm/commit/b3f91ea54d9fee0ef7e73a32c6b8456bbe252811 > > > In file included from >

Hi LLVM developers, After Remove int_x86_sse2_psll_dq_bs and int_x86_sse2_psrl_dq_bs intrinsics. The builtins aren't used by clang. https://reviews.llvm.org/rL229069 there was no Intrinsic::x86_sse2_psrl_dq any more, then how to migrate: Function *F = Intrinsic::getDeclaration(TheModule, Intrinsic::x86_sse2_psrl_dq); Result = Builder.CreateCall(F,

在 2017年04月26日 16:51, Simon Dardis 写道: > Hi Leslie, > > I've been seeing those failures as well (I own those buildbots). Like yourself, I'm a bit > uncertain as to why they're occurring. I'm currently investigating. I suspect it's a case > that the build directory has gone stale. Perhaps! and buildbots cover how many LLVM Backend targets? thanks! > >

Hi Martin, Thanks for your response! I haven't tested compiling OpenJDK 12-dev with LLVM toolchain, perhaps the issue had been fixed already, because clang treat invalid argument '-std=gnu++98' not allowed with 'C' as error. It is better only apply EXTRA_CFLAGS to C without EXTRA_CXXFLAGS. Furthermore, I just have interest, did you use clang analyzer, sanitizer and

it's difficult to use llvm tools like sanitizers on openjdk sources, because of the "cheating" - relying on undefined behavior, and the JIT. On Wed, Sep 5, 2018 at 6:09 PM, Leslie Zhai <zhaixiang at loongson.cn> wrote: > Hi Martin, > > Thanks for your response! > > I haven't tested compiling OpenJDK 12-dev with LLVM toolchain, perhaps the > issue had

Hi Leslie, I suggest adding these 3 papers to your reading list. Register allocation for programs in SSA-form Sebastian Hack, Daniel Grund, and Gerhard Goos http://www.rw.cdl.uni-saarland.de/~grund/papers/cc06-ra_ssa.pdf Simple and Efficient Construction of Static Single Assignment Form Matthias Braun , Sebastian Buchwald , Sebastian Hack , Roland Leißa , Christoph Mallon , and Andreas

- my old email address. The ISA_* classes might not be the best choice for this. There's an overall hierarchy and ordering to the ISA_* classes since they represent the generations of the MIPS ISA. If these extensions are available in Loongson chips based on MIPS32r1 and MIPS32r2 for example, it becomes difficult to describe with ISA_* classes without duplicating instruction definitions or

Hi LLVM developers, GCC[1] is able to use Loongson ISA[2] for instruction selection: $ cat hello.c #include <stdio.h> int main(int argc, char *argv[]) { printf("Hello World\n"); return 0; } $ gcc -O0 -S hello.c $ cat hello.s .file 1 "hello.c" .section .mdebug.abi64 .previous .nan legacy .gnu_attribute 4, 1 .abicalls

Hi Pete, Thanks for your kind response! I migrated AVR target for lld https://reviews.llvm.org/D32991 it is very beginning, only support R_AVR_CALL reloc, and ARC is more complex than AVR, I will learn it from binutils, also ARC related doc, then try to implement it. 发自我的iPhone ------------------ Original ------------------ From: Pete Couperus <Peter.J.Couperus at synopsys.com> Date:

Hi Thomas, Thanks for your kind response! Please review my backport for hs25, thanks a lot! diff -r 3544d85cfe11 src/share/vm/opto/lcm.cpp --- a/src/share/vm/opto/lcm.cpp Thu Jul 19 10:00:36 2018 +0100 +++ b/src/share/vm/opto/lcm.cpp Fri Jul 20 10:06:37 2018 +0800 @@ -49,7 +49,7 @@ // Check whether val is not-null-decoded compressed oop, // i.e. will grab into the base of the heap

Hello Leslie, The errors coming from the gnu assembler are due to the file being assembled in Arm state, to get rid of the errors you'll either need to put a .thumb directive in the file, or pass -mthumb to the assembler via arm-linux-gnu-gcc -Wa,-mthumb (I think). I'm not able to explain what you are seeing in your print out as it doesn't quite match the map file. Looking at your

Hi all, Thanks for Aleksandar Beserminji great job: https://reviews.llvm.org/D50437 It is not easy to reproduce the LLVMBUG-38221[1] by building OpenJDK8, it needs some workaround https://raw.githubusercontent.com/xiangzhai/jdk8u-dev/master/Workaround-compile-with-llvm.patch LLVM toolchain[2] is just able to compile OpenJDK8 for mips64el now: http://hg.loongnix.org/ 1.