similar to: [RFC] Script to match open Phabricator reviews with potential reviewers

I just saw this, and I have to say -- thanks, Kristof! Do you know if this is something that could be automated in Phabricator, instead of something that people run on their own? Or is the intent of this to be something that ran regularly (say, weekly or daily) that would email people (or the list) that could be doing the reviews for some of the open patches? On Sat, Apr 28, 2018 at 1:01 AM,

Hi, When using Wine to run Windows ARM64 executables on Linux, there's one major ABI incompatibility between the two; Windows treats the x18 register as the reserved platform register, while it is free to be clobbered anywhere in code on Linux. The Wine code sets up this register before passing control over to the Windows executable code, but whenever the Windows code calls a function

Hi Evgeny, I know of the current machine outliner in LLVM. If you look in the "More detailed performance data" in the end section it includes performance comparisons to the machine outliner. As for the algorithmic approach they are kind of similar. Machine Outliner: - Builds a suffix tree based on identical equivalence between machine instrs. - Uses target specific cost model for

> Just chiming in about the outliner stuff. (In general, I think it's desirable to have multiple options for how early/late a pass runs.) I'm wondering if MachineOutliner can be augmented to add MachineFunctionSplitter functionalities as well. If the analysis part of MachineOutliner can allow single basic block outlining with some cost models. Aditya Kumar Compiler Engineer

Teaching the back end about size optimization sounds great, even without the exciting work on MachineOutliner. It would strip some nasty hacks from an out of tree back end that cares about code size :) Thank you > The first patch is one that teaches the backend about size optimization > levels. This is comparable to what's done in the inliner. Today, the only > way to tell if

Have not gotten much further on this, I can so far only use one memory with (for example) def LDr1 : F1< (outs GenRegs:$dst), (ins GenRegs:$addr), "ld*0* $dst, ($addr)", [(set GenRegs:$dst, (load GenRegs:$addr))],IIGenLoad>; and def LDrr : F1< (outs GenRegs:$dst), (ins MEMrr:$addr), "ld*0* $dst, ($addr)",

On Mon, Jul 24, 2017 at 4:14 PM, Quentin Colombet via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi River, > > On Jul 24, 2017, at 2:36 PM, River Riddle <riddleriver at gmail.com> wrote: > > Hi Quentin, > I appreciate the feedback. When I reference the cost of Target Hooks it's > mainly for maintainability and cost on a target author. We want to keep the

Hi all, The MachineOutliner has come a long way since the original incarnation presented at the 2016 LLVM Developer's Meeting [1]. In particular, we've been pushing a lot on the AArch64 target for the MachineOutliner. It's mature enough at this point that we'd like to take things a step further and turn it on by default in AArch64 under -Oz. Since the primary goal of -Oz is

> On Jul 25, 2017, at 9:24 AM, Jessica Paquette <jpaquette at apple.com> wrote: > >> The two passes are pretty different in their approaches to congruency finding, so I don't think it helps to group them as though they were interchangeable "outliner technology". The two passes might be totally orthogonal. > > I think that based off how River described his

Hi Yvan, On Mon, 5 Nov 2018 at 10:11, Yvan Roux via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Yes, I'll submit an RFC soon, my prototype works fine but I still have > a couple issues to tackle (some Thumb1 corner cases, PIC code > generation, ...) and enhance the testsuite. Any news on this? I'm starting to look into 32-bit ARM outlining too and could probably help

Hello, My target has two data memories, each with its own load/store instructions but also has some instructions using both memories. I want to be able to access both memories in C-programs through the address space attribute. I have two ideas so far: Either: use two sets of addressing modes in InstrInfo.td: def ADDRrr_A : ComplexPattern<i16, 2, “SelectADDRrr_A", [], []>; def ADDRri :

> Porting the outliner on ARM is in my plans for this year (as discussed > with other ARM folks at EuroLLVM last week), to avoid duplication is > it ok for you if I work on it, David, Jessica ? Yeah, sounds great to me. I had merely got as far as looking at the AArch64 code to see how easy it would be to copy, without any honest expectation of being able to look into it properly any time

Hi, On 25 April 2018 at 14:02, David Green via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Hello > > A 4.4% geomean codesize improvement is really impressive. That stuff is hard to come by, you usually have to nibble away at it bit at a time. I ran some codesize benchmarks we have and they were in the same ballpark. Some of these are quite small so had less opportunity for

> Porting the outliner on ARM is in my plans for this year (as discussed > with other ARM folks at EuroLLVM last week), to avoid duplication is > it ok for you if I work on it, David, Jessica ? Sounds good to me; an ARM target would be great! - Jessica > On Apr 26, 2018, at 2:17 AM, Yvan Roux <yvan.roux at linaro.org> wrote: > > Hi, > > On 25 April 2018 at

On Wed, Sep 27, 2017 at 9:28 AM, Jessica Paquette via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I think that, given previous discussion on the topic, we might want a split > like this: > > (1) Search structure > > Suffix tree or suffix array. > > (2) Numbering/mapping/congruence scheme > > Every outliner should implement a function that maps

Hi Davide, Thanks! I think that this is a really great thing to be pushing forward in general. > That said, do we really want encapsulate the logic for finding > candidates into an interface? It's unclear whether it should live but > it seems much more akin to the stuff living in Transforms/Utils than a > proper interface. > So, IMHO it's much more suitable for an

On 4/20/2018 7:06 PM, Jessica Paquette via llvm-dev wrote: > We perform regular testing to ensure the outliner produces correct > AArch64 code at -Oz. Tests include the LLVM test suite and standard > external test suites such as SPEC. All tests compile and > execute. We've also been making sure that the outliner produces > debuggable code. Users are still guaranteed to have

I think that, given previous discussion on the topic, we might want a split like this: (1) Search structure Suffix tree or suffix array. (2) Numbering/mapping/congruence scheme Every outliner should implement a function that maps instructions (or whatever structure you want to outline, crazy thoughts…) to integers. That should be passed to the search structure, which will return a list of

> On Sep 27, 2017, at 3:23 PM, Davide Italiano via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On Wed, Sep 27, 2017 at 9:28 AM, Jessica Paquette via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> I think that, given previous discussion on the topic, we might want a split >> like this: >>

Thanks for reducing that for me! The outliner pulls out the following: OUTLINED_FUNCTION_0: // @OUTLINED_FUNCTION_0 .cfi_sections .debug_frame .cfi_startproc // %bb.0: adrp x29, g1 add x29, x29, :lo12:g1 adrp x30, g2 // This adrp shouldn’t have been outlined. ret It shouldn’t be pulling out that adrp. There’s a special case for arps in