similar to: Alignment Member Functions should be Virtual

Displaying 20 results from an estimated 1000 matches similar to: "Alignment Member Functions should be Virtual"

2018 May 02
0
Alignment Member Functions should be Virtual
On 5/1/2018 4:35 AM, Hiroyuki Chishiro via llvm-dev wrote: > Dear community, > > I have developed a backend of new 32-bit RISC ISA, which does not have > unaligned memory access instructions (e.g., LWL, LWR, SWL, and SWR in > MIPS). > Since char and short variables are not 32-bit alignment, these > variables cannot be correctly accessed. > Therefore, alignment member
2018 May 03
3
Alignment Member Functions should be Virtual
Dear Eli, Thank you for your reply. My backend is based on and extends MIPS ISA and disables generating unaligned memory access instructions because my new 32-bit RISC ISA does not have them. In this case, an array of char string (i.e., its beginning address) is not 32-bit align. However, aligned memory access instructions (such as 32-bit LW) are used in this case, and hence my compiler cannot
2018 May 03
0
Alignment Member Functions should be Virtual
On 3 May 2018 at 03:23, Hiroyuki Chishiro via llvm-dev <llvm-dev at lists.llvm.org> wrote: > However, aligned memory access instructions (such as 32-bit LW) are > used in this case, and hence my compiler cannot correctly access char > string written in C. This hardware situation was reasonably common in the past, but code still accessed objects not aligned to 32-bits. The compiler
2012 Jan 26
2
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
I'm trying to generate MipsGenAsmMatcher.inc for MipsAsmParser.cpp. What added restrictions for the .td file contents are there for tblgen -gen-asm-matcher? For the Mips platform we create the following .inc files through tblgen. tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info) tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info) tablegen(LLVM MipsGenCodeEmitter.inc -gen-emitter)
2002 Aug 06
2
Memory leak in R v1.5.1?
Hi, I am trying to minimize a rather complex function of 5 parameters with gafit and nlm. Besides some problems with both optimization algorithms (with respect to consistantly generating similar results), I tried to run this optimization about a hundred times for yet two other parameters. Unfortunately, as the log below shows, during that batch process R starts to eat up all my RAM,
2004 Jun 17
1
access to subdirs of share only
Hi, I've upgraded from 2.2.8a-SuSE PDC to 3.04-SuSE. OS is Linux 2.6, SuSE 9.1 Prof. All users can logon correctly on all W2K domain clients and obtain their roaming profiles. Now particular W2K SP 4 domain client cannot access to the top-level of a share, WinExplorer says "Access denied". If the client connects to a subdir of the same share as a new drive all works fine, same
2012 Dec 17
2
Transport endpoint
Hi, I've got Gluster error: Transport endpoint not connected. It came up twice after trying to rsync 2 TB filesystem over; it reached about 1.8 TB and got the error. Logs on the server side (on reverse time order): [2012-12-15 00:53:24.747934] I [server-helpers.c:629:server_connection_destroy] 0-RedhawkShared-server: destroyed connection of
2012 Feb 03
0
[LLVMdev] HELP - tblgen -gen-asm-matcher restrictions on .td content
Hi Jack, On Jan 25, 2012, at 6:45 PM, "Carter, Jack" <jcarter at mips.com> wrote: > I'm trying to generate MipsGenAsmMatcher.inc for MipsAsmParser.cpp. > > What added restrictions for the .td file contents are there for tblgen -gen-asm-matcher? > Lots, as you're finding, almost all of them completely undocumented. :( > For the Mips platform we create
2012 Jan 16
6
Need advice - one large application or many small ones?
I have about 20 relatively small applications running on the server. They mostly access the same database tables. Is it more efficient to combine them into a single application with lots of controllers or to keep them as separate applications. ruby 1.9.2 rails 3.0.1 capistrano 2.9.0 passenger 3.0.4 apache 2.2.12 -- You received this message because you are subscribed to the Google Groups
2013 Jan 24
3
[LLVMdev] [lld] driver and options questions
Michael, I'm looking at flushing out the mach-o driver and targetinfo. Can we rename the "ld64" flavor to "darwin". The command line tool on MacOSX is called "ld" - just like on unix. The name ld64 is the current source repository name for the linker. Once lld takes over, the term ld64 won't mean anything. I've worked through adding DarwinOpts.td
2016 Mar 30
4
LLD: Possible optimization for TargetInfo
On Wed, Mar 30, 2016 at 4:20 PM, Sean Silva <chisophugis at gmail.com> wrote: > I believe the relocation stuff that Rafael is currently working on will > make this a non-issue (it will make relocation application much friendlier > for the CPU). > I don't think Rafael's patch would make this a non-issue. He's making scanRelocs to create data, which would reduce the
2016 Mar 30
2
LLD: Possible optimization for TargetInfo
I was wandering how much is the overhead of virtual function calls of TargetInfo member functions. TargetInfo handles platform-specific details, and we have target-specific subclasses of that class. The subclasses override functions defined in TargetInfo. The TargetInfo member functions are called multiple times for each relocation. So the cost of virtual function calls may be non-neglible. That
2019 May 10
1
Welcome Hiroyuki Katsura as Google Summer of Code 2019 student
Dear libguestfs developers and users, it is my pleasure to welcome Hiroyuki Katsura as Google Summer of Code 2019 student for libguestfs! He will work on adding Rust bindings, to allow using libguestfs in Rust applications. You can read the project submission here: https://summerofcode.withgoogle.com/projects/#6730007286644736 I'm the main mentor of this project, with Rich Jones, and Martin
2011 Apr 08
3
[LLVMdev] dragonegg build failure
On Fri, Apr 08, 2011 at 08:28:27AM +0200, Duncan Sands wrote: > Hi Jack, > > > The new dragonegg 2.9 sources fail to build against either FSF gcc 4.5.2 or 4.5.3svn > > (with the i386_static.diff patch applied) on x86_64-apple-darwin10. In both cases, the > > build fails as... > > what does the command > ./TargetInfo -p > return (the TargetInfo program
2013 Mar 04
2
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
Hi Jack, On Sat, Mar 2, 2013 at 8:15 AM, Jack Carter <Jack.Carter at imgtec.com> wrote: > Jia, > > I made what I believe to be the correct changes and rebuilt clang and llc. Are the results what you expected? I so I will prepare the patches for commitment. > > Jack > > clang ../mips_R_JiaLiu.c -o mips_R_JiaLiu.ll -emit-llvm -O3 -S -target mipsel-unknown-linux -std=gnu89
2019 Jul 26
4
Re: [PATCH] Rust bindings: Add Rust bindings
Hi Hiroyuki, sorry for the late reply. Most of the work is definitely nice! There are few notes below, although they are not big issues. I will check this patch once more on monday, especially the rust parts. Otherwise, I'd say that we are close to merging this :) On Tuesday, 23 July 2019 10:37:17 CEST Hiroyuki Katsura wrote: > From: Hiroyuki_Katsura
2013 Feb 28
0
[LLVMdev] [cfe-dev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
Hi all, I find clang-mips doesn't support constraint 'R' and I'm trying make LLVM/Clang support it. I did a little job, but Clang can not generate right code, it use the same register in inline asm, and the binary will segment fault in MIPS environment. My test case: /* constraint.c */ #include <stdio.h> int main(int argc, char* argv[]) { int a = 4; int b = 10;
2016 Mar 30
0
LLD: Possible optimization for TargetInfo
> On Mar 30, 2016, at 4:25 PM, Rui Ueyama via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On Wed, Mar 30, 2016 at 4:20 PM, Sean Silva <chisophugis at gmail.com <mailto:chisophugis at gmail.com>> wrote: > I believe the relocation stuff that Rafael is currently working on will make this a non-issue (it will make relocation application much friendlier for the CPU).
2019 Jul 30
4
[PATCH] Rust bindings: Implement Event features
This patch includes: - Event callback handlers - Tests related to events(410-430) --- generator/rust.ml | 38 ++++++- rust/src/base.rs | 24 +++-- rust/src/error.rs | 8 +- rust/src/event.rs | 158 ++++++++++++++++++++++++++++ rust/src/lib.rs | 2 + rust/tests/040_create_multiple.rs | 2 +-
2019 May 05
2
How to get CLang array alloca alignments to be smaller than 16 bytes?
> Are you looking in Clang's source, and that from the same 7.0 version? Yes, I am, and it’s the same version (7.0.1). “LargeArrayMinWidth” is only on the following files: TargetInfo.cpp TargetInfo.h So I still think there’s something else that makes the difference on the x86 target. Anyway, I will now investigate other targets as my temporary frontend. It is right that other targets