similar to: [RFC] llvm-exegesis: Automatic Measurement of Instruction Latency/Uops

On Thu, Mar 15, 2018 at 4:41 PM, Hal Finkel via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > On 03/15/2018 10:04 AM, Guillaume Chatelet via llvm-dev wrote: > > [You can find an easier to read and more complete version of this RFC here > <https://docs.google.com/document/d/1QidaJMJUyQdRrFKD66vE1_N55whe0coQ3h1GpFzz27M/edit?ts=5aaa84ee#> > .] > > Knowing

On 03/15/2018 10:04 AM, Guillaume Chatelet via llvm-dev wrote: > [You can find an easier to read and more complete version of this RFC > here > <https://docs.google.com/document/d/1QidaJMJUyQdRrFKD66vE1_N55whe0coQ3h1GpFzz27M/edit?ts=5aaa84ee#>.] > > Knowing instruction scheduling properties (latency, uops) is the basis > for all scheduling work done by LLVM. > > >

Sounds like a very useful tool.  Thank you for contributing. Taking a step back and looking at the big picture, combining this with the recently contributed llvm-mca dramatically improves our scheduling and performance analysis story.  Being able to take a snippet of code on a particular machine, measure latency/throughput/ports for each instruction (this tool), and then analyze the entire

On 03/15/2018 10:49 AM, Clement Courbet wrote: > > > On Thu, Mar 15, 2018 at 4:41 PM, Hal Finkel via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > > On 03/15/2018 10:04 AM, Guillaume Chatelet via llvm-dev wrote: >> [You can find an easier to read and more complete version of this >> RFC here >>

Hello, I've been testing llvm-exegesis on X86. Latency and inverse_throughput modes work fine but when I run uops I get an error: event not found - cannot create event uops_dispatched_port:port_0 LLVM ERROR: invalid perf event 'uops_dispatched_port:port_0' I'm running this on a i7-4790K. Am I missing something on my computer or is this not yet fully implemented? This also

Since the option of running -mode=inverse_throughput was added to llvm-exegesis the names of classes like UopsSnippetGenerator and UopsBenchmarkRunner, that this mode shares with uops, started to be less descriptive. Inverse_throughput doesn't use the uops counters, so for example, the instruction layout shared between these two modes is really connected to parallelism, not uops. It's

Hi everyone, Can someone help me with running llvm-exegesis tool on x86_64? I saw that I need libpfm library, but I'm still getting segmentation fault when I try to run the tool. Is there anything else I need to do (build llvm on some specific way) ? This is how I tried to run this tool: llvm-exegesis -mode=latency -opcode-name=ADD64rr Thanks, Luka -------------- next part -------------- An

Hi all, In a recent IISWC paper <http://groups.csail.mit.edu/commit/papers/19/ithemal-measurement.pdf>, we've proposed BHive - a new methodology for benchmarking arbitrary basic blocks that has several advantages over the one currently used in llvm-exegesis. In particular, the new methodology: - automatically handles memory accesses in the basic block, without the need to manually

> On May 9, 2020, at 5:12 PM, Andrea Di Biagio via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > The llvm scheduling model is quite simple and doesn't allow mca to accurately simulate the execution of individual uOPs. That limitation is sort-of acceptable if you consider how the scheduling model framework was originally designed with a different goal in mind (i.e. machine

Hi, I’m trying to work out the behavior of llvm-mca on instructions with ProcResGroups. My current understanding is: When an instruction requests a port group (e.g., HWPort015) and all of its atomic sub-resources (e.g., HWPort0,HWPort1,HWPort5), HWPort015 is marked as “reserved” and is issued in parallel with HWPort0, HWPort1, and HWPort5, blocking future instructions from reserving HWPort015

I am, of course, a huge fan of this effort. :) > >> >> - >> >> [??] Make the tool work for other CPUs. This mainly depends on the >> presence of performance counters. >> >> Having these requirements documented will be great. In particular, it's important to document what kind of functionality we need out of the PMU rather than any

Hi Alex, On Sun, May 10, 2020 at 4:00 PM Alex Renda <renda at csail.mit.edu> wrote: > Thanks, that’s very helpful! > > > > Also, sorry for the miscue on that bug with the 2/4 cycles — I realize now > that that’s an artifact of a change that I made to not crash when resource > groups overlap without all atomic subunits being specified: > > `echo 'fxrstor

Please can we add a code owner entry for llvm-mca, which should probably be Andrea. I wasn't sure if we need to go through a full nomination process for new tools like this (and llvm-exegesis?) or we can just add the primary contributor to the CODE_OWNERS.TXT list immediately. Thanks, Simon.

I am pleased to announce that LLVM 7 is now available. Get it here: https://llvm.org/releases/download.html#7.0.0 The release contains the work on trunk up to SVN revision 338536 plus work on the release branch. It is the result of the community's work over the past six months, including: function multiversioning in Clang with the 'target' attribute for ELF-based x86/x86_64 targets,

I am pleased to announce that LLVM 7 is now available. Get it here: https://llvm.org/releases/download.html#7.0.0 The release contains the work on trunk up to SVN revision 338536 plus work on the release branch. It is the result of the community's work over the past six months, including: function multiversioning in Clang with the 'target' attribute for ELF-based x86/x86_64 targets,

Hey guys, I'm currently investigating broadcasts from the constant pool on Sandy Bridge. I see this comment in llvm/lib/Target/X86/X86ISelLowering.cpp: // Handle the broadcasting a single constant scalar from the constant pool // into a vector. On Sandybridge it is still better to load a constant vector // from the constant pool and not to broadcast it from a scalar. Would anyone

Hi there I get the following error message when i try to "xm create <domid>" Error: Error creating domain: (22, ''Invalid argument'') I have included everything i can think of Thanks The DomU config is kernel = "/boot/vmlinuz-2.6.12-xenU" ramdisk = "/boot/initrd-2.6.12.6-xenU.img" memory = 128 name = "xen01" nics=1 disk = [

Hi Andrea, So does this definition make sense for basic blocks with more than one instructions? E.g. how should one interpret a basic block with RThroughput of 2.3? On Fri, Jun 7, 2019 at 7:39 AM Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote: > Hi Tom, > > Field 'Total Cycles' from the summary view simply reports the elapsed > number of cycles for the entire

Alex, I have built ubuntu binaries for the last couple of releases. I apologize -- I haven't built those new binaries yet, I only have uploaded the SLES ones. I have an ubuntu 14 tarball that I'll upload today. I will work on getting ubuntu 16 or 17 next. The dpkg/APT repos might be a good substitute, though. Hans, apologies -- I should've asked to hold the 7.0.0 release for

Makes sense to me, please add it! Thanks again for contributing this work, -Chris > On Apr 18, 2018, at 5:07 AM, Simon Pilgrim via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Please can we add a code owner entry for llvm-mca, which should probably be Andrea. > > I wasn't sure if we need to go through a full nomination process for new tools like this (and