similar to: TI 59 backend

On 3/14/2018 8:53 AM, via llvm-dev wrote: > Hello, > > I am a new comer to llvm framework. I read quite many tutorials but I am still not able to determine whether llvm can be used for my project: implementing a backend for the famous Texas Instruments 59 Calculator (sold from 1977 to 1982). > > This is not a CPU but it uses a kind of bytecode that is interpreted (see examples in

Certainly a calculator supports arithmetic :-) The TI 58/59 support things such as 1 3 STO IND 02 which, if memory 02 currently holds "42", will store 13 into memory 42. So, yes, there are pointers. And address arithmetic. On Wed, Mar 14, 2018 at 11:30 AM, Friedman, Eli via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 3/14/2018 8:53 AM, via llvm-dev wrote: >

Hello Bruce and Eli, Yes, you are definitely right: indirect access to registers is possible through IND XX instruction. So, no worry on that side. My concern is about STO instruction description in TI59InstrInfo.td file. It looks impossible to me to categorize this instruction as a "classical" N-bytes long instruction (as N fully depends on the value you want to store). Could it be a

Hello Daniel, At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday. Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with

Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips

Is it possible to assign the value of subtarget features using more complex expressions with code as opposed to using the mechanism that tablegen affords. For example, if Mips16 or Micro Mips is not present, then I want the subfeature "standard encoding". If I can't do this, then it requires me to write a more complex expression for the "standard encoding" expresions.

I have not done the upgrade yet. Since this is a production cluster I need to make sure it stays up or schedule some downtime if it doesn't doesn't. Thanks. On Tue, Dec 19, 2017 at 10:11 AM, Atin Mukherjee <amukherj at redhat.com> wrote: > > > On Tue, Dec 19, 2017 at 1:10 AM, Ziemowit Pierzycki <ziemowit at pierzycki.com> > wrote: >> >> Hi, >>

Looks like a bug as I see tier-enabled = 0 is an additional entry in the info file in shchhv01. As per the code, this field should be written into the glusterd store if the op-version is >= 30706 . What I am guessing is since we didn't have the commit 33f8703a1 "glusterd: regenerate volfiles on op-version bump up" in 3.8.4 while bumping up the op-version the info and volfiles were

I was attempting the same on a local sandbox and also have the same problem. Current: 3.8.4 Volume Name: shchst01 Type: Distributed-Replicate Volume ID: bcd53e52-cde6-4e58-85f9-71d230b7b0d3 Status: Started Snapshot Count: 0 Number of Bricks: 4 x 3 = 12 Transport-type: tcp Bricks: Brick1: shchhv01-sto:/data/brick3/shchst01 Brick2: shchhv02-sto:/data/brick3/shchst01 Brick3:

There is a race in virtio_net, dealing with disabling/enabling the callback. I saw the following oops: kernel BUG at /space/kvm/drivers/virtio/virtio_ring.c:218! illegal operation: 0001 [#1] SMP Modules linked in: sunrpc dm_mod CPU: 2 Not tainted 2.6.25-rc1zlive-host-10623-gd358142-dirty #99 Process swapper (pid: 0, task: 000000000f85a610, ksp: 000000000f873c60) Krnl PSW : 0404300180000000

There is a race in virtio_net, dealing with disabling/enabling the callback. I saw the following oops: kernel BUG at /space/kvm/drivers/virtio/virtio_ring.c:218! illegal operation: 0001 [#1] SMP Modules linked in: sunrpc dm_mod CPU: 2 Not tainted 2.6.25-rc1zlive-host-10623-gd358142-dirty #99 Process swapper (pid: 0, task: 000000000f85a610, ksp: 000000000f873c60) Krnl PSW : 0404300180000000

Yes Atin. I'll take a look. On Wed, Dec 20, 2017 at 11:28 AM, Atin Mukherjee <amukherj at redhat.com> wrote: > Looks like a bug as I see tier-enabled = 0 is an additional entry in the > info file in shchhv01. As per the code, this field should be written into > the glusterd store if the op-version is >= 30706 . What I am guessing is > since we didn't have the commit

Hola, tengo una matriz de especies donde cada celda tiene datos con caracteres (son parentesis). Cómo la puedo reordenar considerando tanto filas como columnas? Ejemplo: ,Specie 1, Specie2, Specie3 Specie1, NA, 3(1-4), 8(6-9) Specie2, 5(2-6),NA, 5(4-6) Specie3, 2(1-3), 10(5-15), NA Quiero: ,Specie 2, Specie3, Specie1 Specie2, NA, 5(4-6) , 5(2-6) Specie3, 10(5-15) ,NA,

Hi, Sorry for the late report but I've only just found these issues. Llvm.org isn't working for me at the moment but I'll file tickets once it is. The issues are: 1. Almabench has some significant numerical differences and fails the reference check for some configs. I'm investigating this one at the moment but early indications are that it's a similar (but different)

Hi R-programmers ! I would like to perform a linear model regressio using the 'lm' function and i don't know how to do it. The data is organised as below: Month ExcessReturn Return STO 8 0.047595875 0.05274292 0.854352503 8 0.016134874 0.049226941 4.399372005 8 -0.000443869 0.004357305 -1.04980297 9 0.002206554 -0.089068828 0.544809429 9 0.021296551 0.003795071

Hi Rui, Rafael, You are reviewers of two MIPS related patches for LLD linker: - Handle cross-mode (regular <-> microMIPS) jumps https://reviews.llvm.org/D40147 - Multi-GOT implementation https://reviews.llvm.org/D31528 Both patches implement essential part of MIPS architecture. microMIPS is something like ARM Thumb. Multi-GOT support required to link any rather complex application

> > > clang+llvm-3.6.0-rc2-mipsel-linux-gnu.tar.xz > > > All clear for default options. > > > Still running for the other configs. > > > > I just had to kill Searching-dbl.simple and Packing-dbl.simple for the > > mips32 config which were at 65hrs and 15hrs real time respectively. This is > > far in excess of the 15,000s time limit that's

Hi R-programmers ! I would like to perform a linear model regression month by month using the 'lm' function and i don't know how to do it. The data is organised as below: Month ExcessReturn Return STO 8 0.047595875 0.05274292 0.854352503 8 0.016134874 0.049226941 4.399372005 8 -0.000443869 0.004357305 -1.04980297 9 0.002206554 -0.089068828 0.544809429 9 0.021296551

Hello. I'm trying to make some graphics with nationalized labels (pdf for use in LaTeX document). On console (displayed on screen) using all looks ok: ----------------------------------------\/ data<-rnorm(100) hist(data,main='Rozk?ad g?sto?ci punkt?w', xlab='Warto?? na osi y', ylab='Cz?sto?? wyst?powania') -------------------------------------------/\ But

Hi all, I plan to deprecate the experimental microMIPS64R6 backend for the 5.0 release and remove it after the release. Currently there are no CPUs that use that particular sub-ISA which makes it difficult to justify the maintenance and parallel development effort. If there was a CPU design produced that did use microMIPS64R6, the backend could be restored from the archive. Any comments or