similar to: Does OpenMP hints bypass the vectorisation legality check in llvm

Displaying 20 results from an estimated 2000 matches similar to: "Does OpenMP hints bypass the vectorisation legality check in llvm"

2018 Jan 19
1
Does OpenMP hints bypass the vectorisation legality check in llvm
Tom, Let me go a little deeper. Xinmin's answer is correct but a bit over-simplified. There are parts of "legality" and "cost model" that OpenMP SIMD code has to go through, and current LV is rather unclear about it ---- due to historical reasons ---- and I'm trying to resolve them one small step at a time. See
2018 Jan 19
0
: Does OpenMP hints bypass the vectorisation legality check in llvm
Xinmin, > Tom, your understanding is correct per OpenMP SIMD model. Our implementation behaves as you stated. > Which is not part of LLVM main trunk yet. Is that the implementation that is based on the intrinsics in the RFC you and Hal Finkel had sent out to the list? Or is it a different implementation (and if so, is there some plan to merge the two)? Thanks, --Vikram Adve //
2013 Apr 17
4
[LLVMdev] Loop vectorizer behaviour for 2D arrays and parallel annotation
Hello, I am trying to vectorize the following loop but the vectorizer says: "Found a possible write-write reorder" and does not vectorize. Why? for (j=0; j < 8; j++) { jj = j << 3; m2[j][0] = diff[jj ] + diff[jj+4]; m2[j][1] = diff[jj+1] + diff[jj+5]; m2[j][2] = diff[jj+2] + diff[jj+6]; m2[j][3] = diff[jj+3] + diff[jj+7]; m2[j][4] = diff[jj ] -
2020 Jun 24
6
[RFC] Compiled regression tests.
Am Mi., 24. Juni 2020 um 10:12 Uhr schrieb David Blaikie <dblaikie at gmail.com>: > > As mentioned in the Differential, generating the tests automatically > > will lose information about what actually is intended to be tested, > > Agreed - and I didn't mean to suggest tests should be automatically > generated. I work pretty hard in code reviews to encourage tests to
2013 Oct 23
2
[LLVMdev] First attempt at recognizing pointer reduction
On 23 October 2013 16:05, Arnold Schwaighofer <aschwaighofer at apple.com>wrote: > In the examples you gave there are no reduction variables in the loop > vectorizer’s sense. But, they all have memory accesses that are strided. > This is what I don't get. As far as I understood, a reduction variable is the one that aggregates the computation done by the loop, and is used
2013 Apr 17
0
[LLVMdev] Loop vectorizer behaviour for 2D arrays and parallel annotation
On 04/17/2013 04:55 AM, Anadi Mishra wrote: > Hello, > > I am trying to vectorize the following loop but the vectorizer says: > "Found a possible write-write reorder" and does not vectorize. > Why? To my knowledge, the dependence analysis in the loop vectorizer is not yet able to prove the absence of dependences here. > for (j=0; j < 8; j++) > { > jj
2013 Oct 31
3
[LLVMdev] loop vectorizer misses opportunity, exploit
Hi Frank, This loop should be vectorized by the SLP-vectorizer. It has several scalars (C[0], C[1] … ) that can be merged into a vector. The SLP vectorizer can’t figure out that the stores are consecutive because SCEV can’t analyze the OR in the index calculation: %2 = and i64 %i.04, 3 %3 = lshr i64 %i.04, 2 %4 = shl i64 %3, 3 %5 = or i64 %4, %2 %11 = getelementptr inbounds float*
2013 Oct 31
0
[LLVMdev] loop vectorizer misses opportunity, exploit
Hi Nadav, that's the whole point of it. I can't in general make the index calculation simpler. The example given is the simplest non-trivial index function that is needed. It might well be that it's that simple that the index calculation in this case can be thrown aways altogether and - as you say - be replaced by the simple loop you mentioned. However, this cannot be done in the
2005 May 06
4
Legality Issue & Relaying
Hi All, I'm planning to get a stream running in the next month or two, and will be using ices and icecast. Legality: Further to the last couple of posts regarding legality issue. I notice that the PRC do their licence cost on a percentage of your revenue, seeing as I plan to host no adverts or indeed any commercial aspect I hope to get a licence without actually paying anything. (I've
2010 Feb 22
0
[LLVMdev] SelectionDAG legality: isel creating cycles
Hello, David > Ah, isLegalToFold saves us on trunk.  But we lose folding due to prefetching, > which is unfortunate. > > I am seeing the error with 2.5 (yes, we are upgrading!). > > I guess I'll have to backport some of the isLogalToFold logic. There was x86-only code at pre-2.6 times which was later moved into generic hook named "isLegalAndProfitableToFold". You
2008 Jul 30
2
R -Legality Question about R's Open Source GNU GPL License
whats the license policy of using r as a SaaS with other apps, priced for a fee. I am not sure which license to invoke. regards, ajay [[alternative HTML version deleted]]
2020 Jul 01
6
[RFC] Compiled regression tests.
On 7/1/20 12:40 AM, Michael Kruse via llvm-dev wrote: > To illustrate some difficulties with FileCheck, lets make a > non-semantic change in LLVM: > >     --- a/llvm/lib/Analysis/VectorUtils.cpp >     +++ b/llvm/lib/Analysis/VectorUtils.cpp >     @@ -642,8 +642,8 @@ MDNode *llvm::uniteAccessGroups(MDNode > *AccGroups1, MDNode *AccGroups2) { >          return AccGroups1;
2010 Feb 22
3
[LLVMdev] SelectionDAG legality: isel creating cycles
On Monday 22 February 2010 13:26:54 David Greene wrote: > On Monday 22 February 2010 13:06:39 Chris Lattner wrote: > > > Just wanted to clarify in case someone was wondering about this. > > > > I'm currently working in this area. What pattern is causing the cycle? > > Can I get a testcase? > > I'll see if I can generate one and file a PR. Ah,
2013 Mar 01
2
[LLVMdev] parallel loop metadata simplification
On 2013-03-01, at 11:35 AM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Paul Redmond" <paul.redmond at intel.com> >> To: "Hal Finkel" <hfinkel at anl.gov> >> Cc: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu> >> Sent: Friday, March 1, 2013 10:06:51 AM >> Subject: Re: [LLVMdev] parallel loop
2013 Oct 31
2
[LLVMdev] loop vectorizer misses opportunity, exploit
On 31 October 2013 08:01, Frank Winter <fwinter at jlab.org> wrote: > With current trunk I tried the following on the above example: > > clang++ -emit-llvm -S loop_minimal.cc -std=c++11 > opt -O3 -vectorize-slp -S loop_minimal.ll > opt -O3 -loop-vectorize -S loop_minimal.ll > opt -O3 -bb-vectorize -S loop_minimal.ll > > All optimization passes miss the opportunity.
2002 Jun 20
6
Legality of copying from Splus.
A few days ago, I sent a question to the r-help list enquiring about the *** LEGALITY *** of porting a function from Splus into R. As a particular example, I referred to error.bar. Several people posted code for various versions of error.bar which they had written, but that was NOT WHAT I WAS ASKING FOR/ABOUT!!! [Can't anybody ***read*** these days?] I asked: IS IT
2018 Mar 01
0
[cfe-dev] Disabling vectorisation at '-O3'
No, I’m wrong. I think that bug is actually in ‘hasFlag’ itself. In ‘llvm/lib/Option/ArgList.cpp’ line #70: bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg, bool Default) const { if (Arg *A = getLastArg(Pos, PosAlias, Neg)) return A->getOption().matches(Pos) || A->getOption().matches(PosAlias); return
2010 Jul 26
1
vectorisation?
Hi I have 3500 rows of data (say a single column) in a vector. If I want to compare every ith element with the simple average of the previous (i-5) elements, then I could write something like this: for(i in 6:NROW(data)){ if(data[i] => mean(data[(i-5):i]) (counter[i]=1)} } Is it possible to replicate the above faster in R? -- 'Raghu' [[alternative HTML version deleted]]
2015 Jan 25
4
[LLVMdev] RFB: Would like to flip the vector shuffle legality flag
I ran the benchmarking subset of test-suite on a btver2 machine and optimizing for btver2 (so enabling AVX codegen). I don't see anything outside of the noise with x86-experimental-vector-shuffle-legality=1. On Fri, Jan 23, 2015 at 5:19 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com > wrote: > Hi Chandler, > > On Fri, Jan 23, 2015 at 8:15 AM, Chandler Carruth
2017 Aug 05
2
LLVM Vectorisation Bug
I have matrix multiplication and stencil code. I vectorise it through the following command. opt -S -O3 -force-vector-width=2048 stencil.ll -o stencil_o3.ll in both the examples of matrix mult and stencil it vectorises fine when my loop iterations >2048. but if i keep both iterations and vector width=2048. it produces scalar code IR not vectorizes it. Is it llvm bug? Please help me.