similar to: CFI directives for callee saved registers

Displaying 20 results from an estimated 900 matches similar to: "CFI directives for callee saved registers"

2016 Dec 30
0
RFC: Inline expansion of memcmp vs call to standard library
With the intrinsic support for ‘memcpy’ and ‘memset’ the operands also have associated alignment operands. I think that ‘memcmp’ should also provide the alignment information for each of the source operands (when statically known). In some cases this will lead to more optimal alignment aware lowering, and for targets for which unaligned access is costly or fatal, it can be lowered safely.
2016 Dec 30
2
RFC: Inline expansion of memcmp vs call to standard library
Can I make another suggestion: create an intrinsic for memory equality, e.g. llvm.memcmp_eq.p0i8.p0i8.i64(i8*a, i8*b, i64 len). This intrinsic would return zero if the memory regions are equal, and nonzero otherwise. However, it does NOT return any notion of "greater" or "less". Many applications require only determining equality, rather than a total ordering. Given that
2016 Dec 29
0
RFC: Inline expansion of memcmp vs call to standard library
Improving lowering for memcmp is definitely something we should do for all targets. Doing it in a target specific way is decidedly non-ideal. It looks like we already have some code in SelectionDAGBuilder which tries to optimize the lowering for the memcpy library call. I am a bit confused by the problem you are trying to solve. Are you specifically interested in lowering for constant
2016 Dec 29
2
RFC: Inline expansion of memcmp vs call to standard library
Currently on PowerPC, calls to memcmp are not expanded and are left as library calls. In certain conditions, expansion can improve performance rather than calling the library function as done for functions like memcpy, memmove, etc. This patch (https://reviews.llvm.org/D28163) is an initial implementation for PowerPC to expand memcmp when the size is an 8 byte multiple. The approach currently
2020 Oct 02
2
[RFC] Adding a char set converter to Support library
My understanding is that dynamically linking should pose no problem, but I am no lawyer. On Linux, glibc is also under LGPL license, and LLVM usually links against it. (There is really no need for us to depend on libiconv. If it is deemed to risky, then I can dropped it.) From: Anton Korobeynikov <anton at korobeynikov.info> To: Kai Peter Nacke <kai.nacke at de.ibm.com> Cc:
2009 Aug 25
2
[LLVMdev] Build issues on Solaris
On 19/08/2009, at 4:00 AM, Anton Korobeynikov wrote: > Hello, Nathan > >> or if it should be a configure test, which might be safer. Are there >> any x86 platforms (other than apple) that don't need PLT-indirect >> calls? > Yes, mingw. However just tweaking the define is not enough - we're not Ok, so configure might be the way to go then, maybe something
2020 Oct 02
2
[RFC] Adding a char set converter to Support library
Hi! On z/OS, there is the need to convert strings from EBCDIC to UTF-8 and vice versa. Using the POSIX iconv functions has some challenges, so I created a small wrapper around this functionality to get the same result on all platforms. This functionality is required for reading and writing GOFF object files and can also be used in the frontend. I put up the code on Phabricator
2013 Sep 06
0
[LLVMdev] CFI Directives
On 5 September 2013 19:27, Bill Wendling <wendling at apple.com> wrote: > Hi Rafael, > > I've been staring at the CFI directives and have a question. Some background: I want to generate the compact unwind information using just the CFI directives. I *think* that this should be doable. The issue I'm facing right now is that I need to know how much the stack pointer was
2013 Sep 05
2
[LLVMdev] CFI Directives
Hi Rafael, I've been staring at the CFI directives and have a question. Some background: I want to generate the compact unwind information using just the CFI directives. I *think* that this should be doable. The issue I'm facing right now is that I need to know how much the stack pointer was adjusted. So when I have something like this: .cfi_startproc Lfunc_begin175:
2007 Apr 18
1
Patch: use .pushsection/.popsection
I think this might fix the X bug... -------------- next part -------------- diff -r e698e6ee2fa1 arch/i386/kernel/entry.S --- a/arch/i386/kernel/entry.S Tue Aug 08 10:18:34 2006 -0700 +++ b/arch/i386/kernel/entry.S Tue Aug 08 10:36:17 2006 -0700 @@ -162,17 +162,17 @@ 2: popl %es; \ 2: popl %es; \ CFI_ADJUST_CFA_OFFSET -4;\ /*CFI_RESTORE es;*/\ -.section .fixup,"ax"; \ +.pushsection
2007 Apr 18
1
Patch: use .pushsection/.popsection
I think this might fix the X bug... -------------- next part -------------- diff -r e698e6ee2fa1 arch/i386/kernel/entry.S --- a/arch/i386/kernel/entry.S Tue Aug 08 10:18:34 2006 -0700 +++ b/arch/i386/kernel/entry.S Tue Aug 08 10:36:17 2006 -0700 @@ -162,17 +162,17 @@ 2: popl %es; \ 2: popl %es; \ CFI_ADJUST_CFA_OFFSET -4;\ /*CFI_RESTORE es;*/\ -.section .fixup,"ax"; \ +.pushsection
2012 Oct 19
0
[PATCHv3] xen/x86: don't corrupt %eip when returning from a signal handler
From: David Vrabel <david.vrabel@citrix.com> In 32 bit guests, if a userspace process has %eax == -ERESTARTSYS (-512) or -ERESTARTNOINTR (-513) when it is interrupted by an event /and/ the process has a pending signal then %eip (and %eax) are corrupted when returning to the main process after handling the signal. The application may then crash with SIGSEGV or a SIGILL or it may have subtly
2007 May 21
2
changing definition of paravirt_ops.iret
I'm implementing a more efficient version of the Xen iret paravirt_op, so that it can use the real iret instruction where possible. I really need to get access to per-cpu variables, so I can set the event mask state in the vcpu_info structure, but unfortunately at the point where INTERRUPT_RETURN is used in entry.S, the usermode %fs has already been restored. How would you feel if we changed
2007 May 21
2
changing definition of paravirt_ops.iret
I'm implementing a more efficient version of the Xen iret paravirt_op, so that it can use the real iret instruction where possible. I really need to get access to per-cpu variables, so I can set the event mask state in the vcpu_info structure, but unfortunately at the point where INTERRUPT_RETURN is used in entry.S, the usermode %fs has already been restored. How would you feel if we changed
2014 Aug 13
2
[LLVMdev] Efficient Pattern matching in Instruction Combine
Even if you can't implement such an algorithm sanely, ISTM that auto-generating this code from a table (or whatever), and choosing canonical results (to avoid a fixpoint issue), rather than what seems to be hand-additions of every possible set of minimizations on three variables, is still a better solution, no? At least then you wouldn't have human errors, and a growing file that makes
2018 Jan 24
0
Memory leaks in LegacyPassManager depending on order of addRequired passes
<div class="socmaildefaultfont" dir="ltr" style="font-family:Arial, Helvetica, sans-serif;font-size:10.5pt" ><div dir="ltr" ><div>Hello,<br><br>I notice some strange behavior with the LegacyPassManager. I’ve added a new pass requirement of BlockFrequencyInfoWrapperPass to lib/Transforms/IPO/GlobalOpt.cpp.<br>However,
2014 Aug 13
2
[LLVMdev] Efficient Pattern matching in Instruction Combine
Thanks Sean for the reference. I will go through it and see if i can implement it for generic boolean expression minimization. Regards, Suyog On Wed, Aug 13, 2014 at 2:30 AM, Sean Silva <chisophugis at gmail.com> wrote: > Re-adding the mailing list (remember to hit "reply all") > > > On Tue, Aug 12, 2014 at 9:36 AM, suyog sarda <sardask01 at gmail.com> wrote:
2014 Aug 08
4
[LLVMdev] Efficient Pattern matching in Instruction Combine
Hi Duncan, David, Sean. Thanks for your reply. > It'd be interesting if you could find a design that also treated these > the same: > > (B ^ A) | ((A ^ B) ^ C) -> (A ^ B) | C > (B ^ A) | ((B ^ C) ^ A) -> (A ^ B) | C > (B ^ A) | ((C ^ A) ^ B) -> (A ^ B) | C > > I.e., `^` is also associative. Agree with Duncan on including associative operation too.
2004 Jul 08
2
[LLVMdev] Callee saved register, almost
I've another problem. There's one register, gr6, which is used to return high part of return value for functions returning 64-bit values. For such functions, the register should not be saved, naturally. But when function does not return 64-bit value, then the register must be saved. How can I express this in .td file? - Volodya
2004 Jul 08
0
[LLVMdev] Callee saved register, almost
Vladimir Prus wrote: > I've another problem. There's one register, gr6, which is used to return > high part of return value for functions returning 64-bit values. For such > functions, the register should not be saved, naturally. > > But when function does not return 64-bit value, then the register must be > saved. How can I express this in .td file? Ok, I've managed