similar to: Patch review wanted

Also you might need to check use PostRASchedulerList or PostMachineScheduler, PostRASchedulerList is considered deprecated as mentioned in [1]. [1] http://lists.llvm.org/pipermail/llvm-dev/2017-April/112348.html HTH, chenwj 2017-06-10 4:03 GMT+08:00 陳韋任 <chenwj.cs97g at g2.nctu.edu.tw>: > Not saying I am totally understand how thing works, but I think you're > misleading >

On Mon, 22 May 2017, Dr. ERDI Gergo wrote: > Actually, tracking down the sequence of function calls, it turns out that '8' > is ultimately coming from the following call in DataLayout::getAlignment: > > getAlignmentInfo(AGGREGATE_ALIGN, 0, abi_or_pref, Ty); > > this seems to return 8 with the following datalayout string: > >

Hi Justin, I believe the PTX section in the link below need some love, updating "lib/Target/PTX" to "lib/Target/NVPTX" for example. Would you like to take a look? http://llvm.org/docs/CodeGenerator.html#the-ptx-backend Regards, chenwj -- Wei-Ren Chen (陳韋任) Computer Systems Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667

Hi 陳韋任, Sorry for the late response. On Apr 21, 2012, at 8:03 PM, 陳韋任 wrote: > I have a native compile and the result seems better... You can compare > the result of cross compile [1] and the native compile [2]. > > Any though? > I'm not particularly happy about the failures here. We need to get to the bottom of them. In the previous email, you tried setting CFLAGS and

Hi all, I think it's Gentoo's bug, but I want to know if anyone has the same issue here. I am compiling LLVM trunk on Gentoo (gcc 4.5.2), and I get error message below, --- make[4]: Entering directory `/nfs_home/chenwj/llvm-3.1/svn/build/tools/clang/lib/Frontend' llvm[4]: Compiling InitHeaderSearch.cpp for Release+Asserts build

Hi weiren, Thanks for your suggestion! Yes, I am trying to do this "nested flattening". It seems that I need a post-dominator tree-based algorithm to flatten the nested loops from the innermost to the outermost, level by level. Is there any feature already existed in LLVM tools? Or similar? On Sun, Oct 22, 2017 at 2:31 AM, 陳韋任 <chenwj.cs97g at g2.nctu.edu.tw> wrote: > If

Thanks for the info, Philip. I will update the LLVM Programmer’s Manual first. Regards, chenwj Wei-Ren Chen (陳韋任) Homepage: https://people.cs.nctu.edu.tw/~chenwj 2017-04-02 18:11 GMT+08:00 Philip Pfaffe <philip.pfaffe at gmail.com>: > Hi chenwj, > > http://llvm.org/doxygen/Statistic_8h_source.html is the correct one. The > other two are remnants from older doxygen deployments.

Hi All, The description of ScheduleDAGMILive [1] says: ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure. Does the live interval and register pressure part of ScheduleDAGMILive mean the subclass of ScheduleDAGMILive is a pre-RA scheduler? I assume the post-RA scheduler no need to take

Hello, I have followed steps given in - https://stackoverflow.com/questions/29910051/integrating-llvm-passes/48142693#48142693 <https://stackoverflow.com/questions/29910051/integrating-llvm-passes/48142693#48142693>, to integrate my pass with pass manager and run it with clang. I am able to run my pass with opt - opt -mypass but when I try to run it with clang, I always get an error -

Hi Mats, It's private backend. I will try describing what I am dealing with. struct S { unsigned int a : 8; unsigned int b : 8; unsigned int c : 8; unsigned int d : 8; unsigned int e; } We want to read S->b for example. The size of struct S is 64 bits, and seems LLVM treats it as i64. Below is the IR corresponding to S->b, IIRC. %0 = load

Hi LLVM developers, As one of the maintainers of AVR target, I want to update WritingAnLLVMBackend document to be familiar with the development of backend, because: 1. The structure of LLVMTargetMachine https://github.com/llvm-mirror/llvm/blob/master/docs/WritingAnLLVMBackend.rst#target-machine has been changed a lot! 2. LLVMInitializeSparcTargetInfo

Thanks :) From: 陳韋任 [mailto:chenwj.cs97g at g2.nctu.edu.tw] Sent: 14 April 2017 12:53 To: Martin J. O'Riordan <martin.oriordan at movidius.com> Cc: LLVM Developers <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Options for timing passes in LLVM? Refer to `llc` document [1], it would be `--time-passes`. [1] http://llvm.org/docs/CommandGuide/llc.html HTH,

Hi All, If the target supports quad-register R0:R1:R2:R3 (Rn is 32-bit register), is it possible mapping quad-register to v4i32 so that the following example work? typedef int v4si __attribute__ ((vector_size (16))); void foo(v4si i) { v4si j = i; } I don't know how to write CallingConv.td to represent the concept of occupying quad-register R0:R1:R2:R3 once seeing

Hi Bekket, I don't see any use case in the codebase adding clEnumValEnd at the end of list (for example, [1]), I also don't see there is clEnumValEnd. Do I miss something here? [1] http://llvm.org/doxygen/DwarfDebug_8cpp_source.html Regards, chenwj 2017-06-06 9:53 GMT+08:00 Bekket McClane via llvm-dev < llvm-dev at lists.llvm.org>: > Hi, > > Can anyone help reviewing

Sorry for the off topic. When I login my Phabricator account, I see there is alarm saying "Account Setup Issue: Primary Email Unverified". I cannot see where to ask Phabricator send verification mail to my primary email address. Could you help me out? :-) Thanks. Regards, chenwj 2017-04-24 18:35 GMT+08:00 Eric Liu via cfe-dev <cfe-dev at lists.llvm.org>: > It's working

> In consideration of those codes in XXXAsmPrinter class which print out > MachineInstr in .s format, I tend to think they are old codes that > might be obsolete and will be replaced with MC layer implementation, > but I am not sure. How about sending a patch which remove those obsolete code, and let others give comment? Cheers, chenwj -- Wei-Ren Chen (陳韋任) Computer Systems Lab,

Hi All, When seeing the title "Prolog/Epilog Code Insertion", I'd expect something about XXXFrameLowering.cpp (particular about emitPrologue/emitEpilogue). But the document [1] is about unwind. Is it placed at the right place/section? Thanks. [1] http://llvm.org/docs/CodeGenerator.html#prolog-epilog-code-insertion Regards, chenwj -- Wei-Ren Chen (陳韋任) Homepage:

Hi All, I am looking at a linker error under O2: undefined symbol __lshrdi3 I have two questions here: 1. Does that mean our libgcc (?) doesn't implement __lshrdi3? Or more generally, why I have such linker error? 2. Seems some operations are combined, and replaced with __lshrdi3 call. I am interested in when such libcall will be generated? Could you show me one

Hi All, I am going to clean up those doxygen links on LLVM Programmer’s Manual [1], some are lost and some are too old. However, I am confused on which doxygen link I should pick up. I see there are mutiple links exist on LLVM web site for LLVM classes. Take class Statistic as example, there are: - http://llvm.org/doxygen/Statistic_8h-source.html (the oldest one, I believe it's

Hi all, While building/testing LLVM/Clang on ARM, I often have problems that are undocumented on the website. I would like to contribute my experience if possible so that others can benefit from it. If this is a good idea, I am wondering on what page I should write it down, [1] or [2]? Regards, chenwj [1] http://llvm.org/docs/GettingStarted.html [2] http://llvm.org/docs/FAQ.html -- Wei-Ren