similar to: Idea for Open Project : Smarter way of dumping LLVM IR with -emit-after-all

Displaying 20 results from an estimated 8000 matches similar to: "Idea for Open Project : Smarter way of dumping LLVM IR with -emit-after-all"

2017 May 05
2
Idea for Open Project : Smarter way of dumping LLVM IR with -emit-after-all
> On May 5, 2017, at 8:49 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > > > On 05/05/2017 10:44 AM, vivek pandya via llvm-dev wrote: >> Hello LLVM Devs, >> >> I have an idea to improve effectiveness of IR dump with -emit-after-all based on Adam Nemet's 2016 LLVM Dev presentation. >> I think we can track changes in each function, basic block and
2017 Sep 16
3
RFC: Use closures to delay construction of optimization remarks
Another alternative could be: ORE.emitMissed(DEBUG_TYPE, ...) << ... Then the first line of emitMissed does a check if it is enabled and if not then returns a dummy stream that does nothing for operator<< (and short-circuits all the stream operations) On Sep 15, 2017 2:21 PM, "Adam Nemet via llvm-dev" <llvm-dev at lists.llvm.org> wrote: For better readability we
2017 Sep 17
2
RFC: Use closures to delay construction of optimization remarks
> On Sep 16, 2017, at 4:49 PM, Sean Silva <chisophugis at gmail.com> wrote: > > Actually maybe something like: > > if (auto &E = ORE.emitMissed(DEBUG_TYPE)) { > E.emit(...) << ...; > } Well, the point of this interface was exactly to avoid writing a conditional. If you’re willing to use a conditional you can already write this: if
2017 Sep 19
0
RFC: Use closures to delay construction of optimization remarks
Sean, hopefully you’re OK with that reasoning. I went ahead and committed this in r313691. > On Sep 16, 2017, at 10:43 PM, Adam Nemet <anemet at apple.com> wrote: > > >> On Sep 16, 2017, at 4:49 PM, Sean Silva <chisophugis at gmail.com <mailto:chisophugis at gmail.com>> wrote: >> >> Actually maybe something like: >> >> if (auto &E
2016 Mar 23
5
Open Project : Inter-procedural Register Allocation [GSoC 2016]
Apologies: didn't notice how old this thread is before replying. On Tue, Mar 22, 2016 at 5:24 PM, Sanjoy Das <sanjoy at playingwithpointers.com> wrote: > Hi Vivek, > > [+CC Matthias, Quentin] > > Inter-procedural register allocation can be a big win, but my estimate > is that it will be challenging to complete within one summer unless > you're already familiar
2017 Mar 04
7
Why ISel Shifts operations can only be expanded for Value type vector ?
On Saturday, March 4, 2017, Ryan Taylor <ryta1203 at gmail.com> wrote: > Why you can't still expand it through MUL with a Custom lowering? Or am I > missing something? > > Yes we can but problem occurs when we know that it is shift with constant value than if we return ISD::MUL with constant imm operand than LLVM will convert it to SHL again because the constant will be
2016 May 28
3
Updating RegMask inline
> On May 27, 2016, at 6:55 PM, vivek pandya via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote: > > > On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote:
2016 May 28
2
Updating RegMask inline
static void setXXX(MachineInstr &MI, ...) { for (MachineOperand &MO : MI.operands()) { if (MO.isRegMask()) MO.setRegMask(...); } } > On May 27, 2016, at 7:02 PM, vivek pandya via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > On Sat, May 28, 2016 at 7:29 AM, Matthias Braun <matze at braunis.de <mailto:matze at braunis.de>> wrote: >
2016 May 27
3
Updating RegMask inline
On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> > wrote: > > > > Hello Mentors, > > > > I have completed writing simple register mask calculator pass, an > immutable pass that stores RegMasks and provides API to query them, and a >
2016 May 10
2
[GSoC 2016] Introduction - "Enabling Polyhedral Optimizations in Julia"
Hello Matthias Reisinger, It is simple html page that shows simple abstract ( which I have already added for all projects as per GSoC page) , link to your read-only proposal, blog URL (if you maintain any) , and status reporting interval (if you want to follow) and any other relevant information. You can check out (SVN) related code here http://llvm.org/svn/llvm-project/www/trunk/SummerOfCode/
2019 Aug 26
2
SCEV related question
Here is original C code: void topup(int a[], unsigned long i) { for (; i < 16; i++) { a[i] = 1; } } Here is the IR before the pass where I expect SCEV to return trip-count value ; Function Attrs: nofree norecurse nounwind uwtable writeonly define dso_local void @topup(i32* nocapture %a, i64 %i) local_unnamed_addr #0 { entry: %cmp3 = icmp ult i64 %i, 16 br i1
2016 May 28
0
Updating RegMask inline
On Sat, May 28, 2016 at 7:29 AM, Matthias Braun <matze at braunis.de> wrote: > > On May 27, 2016, at 6:55 PM, vivek pandya via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com> > wrote: > >> >> >> On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini
2016 May 18
2
[GSoC 2016] Introduction - "Enabling Polyhedral Optimizations in Julia"
Thank you Vivek, I posted an according patch on phabricator. I also took the liberty to change the design a little bit (based on the open projects page http://llvm.org/OpenProjects.html). But take it with a grain of salt, I'm no html expert :) Best regards, Matthias Am Dienstag, 10. Mai 2016 19:48:21 UTC+2 schrieb vivek pandya: > > > > *Vivek Pandya* > > > On Tue, May
2016 May 28
0
Updating RegMask inline
On Sat, May 28, 2016 at 12:23 AM, vivek pandya <vivekvpandya at gmail.com> wrote: > > > On Sat, May 28, 2016 at 12:21 AM, Mehdi Amini <mehdi.amini at apple.com> > wrote: > >> >> > On May 27, 2016, at 11:49 AM, vivek pandya <vivekvpandya at gmail.com> >> wrote: >> > >> > Hello Mentors, >> > >> > I have
2016 Jul 12
3
Not able to use PGO with LLVM+Clang built from source
Hello, When I try to use -fprofile-instr-generate with clang (which is built from source) I am getting following error : ld: file not found: /Users/Mr.Pandya/My_Stuff/Active/llvm/build/bin/../lib/clang/3.9.0/lib/darwin/libclang_rt.profile_osx.a clang-3.9: error: linker command failed with exit code 1 (use -v to see invocation) I am not building compiler RT with LLVM. Am I missing any thing
2016 Feb 16
4
[help] Kaleidoscope build fails after llvm-3.8
Hello , I have build llvm from release_38 branch ( only llvm and clang ) and install it. My DYLD_LIBRARY_PATH points to installation-directory/lib. I am compiling example files for Kaleidoscope with following command : clang++ -g toy.cpp -std=c++11 `llvm-config --cxxflags --ldflags --system-libs --libs core mcjit native` -O3 -o toy but it fails with following error: Undefined symbols for
2017 Mar 04
2
Why ISel Shifts operations can only be expanded for Value type vector ?
On Sat, Mar 4, 2017 at 1:19 PM, Bruce Hoult <bruce at hoult.org> wrote: > If your target does not have SHL then why don't you simply disable > converting MUL to SHL? > > MUL is converted to SHL by target independent passes when second operand is power of 2. -Vivek > > On Sat, Mar 4, 2017 at 8:22 AM, vivek pandya via llvm-dev < > llvm-dev at lists.llvm.org>
2016 Mar 23
0
Open Project : Inter-procedural Register Allocation [GSoC 2016]
Hi Vivek, [+CC Matthias, Quentin] Inter-procedural register allocation can be a big win, but my estimate is that it will be challenging to complete within one summer unless you're already familiar with LLVM's register allocator. I've CC'ed some people who can give you some more detailed information. -- Sanjoy On Tue, Feb 9, 2016 at 9:17 PM, vivek pandya via llvm-dev
2016 Mar 18
2
[GSoC 2016] Need more info on Add a MachineModulePass
*Vivek Pandya* On Fri, Mar 18, 2016 at 10:03 PM, Quentin Colombet <qcolombet at apple.com> wrote: > Hi Vivek, > > On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hello, > > Probably this may be too late to start thinking about this project but I > think this is particularly useful feature for LLVM. >
2016 Mar 20
2
We really need more community involvement with GSoC
Hi, Indeed, and I think this suggestion will succeed best if the delta between what community members do now and what they would need to do is small. Loitering on one extra IRC room is trivial; loading a whole new system just at the right time is likely to get fewer members. James On Sun, 20 Mar 2016 at 14:47, Bruce Hoult <bruce at hoult.org> wrote: > IRC doesn't archive messages,