similar to: callee saved regs list

Hi all, The `--itemize-changes' has the following notes within the manual: The other letters in the string above are the actual letters that will be output if the associated attribute for the item is being updated or a "." for no change. Three exceptions to this are: (1) a newly created item replaces each letter with a "+",

Hello, first of all: one of the LLVM 3.0 new feature was a support for GHC specific calling convention on ARM platform. It looks like this support was merged just into 3.0 branch, specifically it appeared in 3.0 RC2. Anyway, I hope this is just a mistake or omission that such support was merged only into 3.0 and not also into HEAD. I've just found it by testing LLVM 3.1 with GHC 7.4.2 and

> I almost change all the instruction formats. It was a huge work. I am going > to compile and run it now. We have done the similar work[1] on this topic by gcc and we have start migrate our platform to LLVM. In my experience, you need to take care the follow part: * ARMBaseRegisterInfo::getRegPressureLimit * ARMBaseRegisterInfo::getRawAllocationOrder * CalleeSavedRegs *

On Jun 24, 2012, at 7:18 AM, Karel Gardas <karel.gardas at centrum.cz> wrote: > > Hello, > > first of all: one of the LLVM 3.0 new feature was a support for GHC specific calling convention on ARM platform. It looks like this support was merged just into 3.0 branch, specifically it appeared in 3.0 RC2. > Anyway, I hope this is just a mistake or omission that such support was

I almost change all the instruction formats. It was a huge work. I am going to compile and run it now. Best Regards, A. Yazdanbakhsh >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> PhD. Student School of Electrical and Computer Engineering University of Wisconsin-Madison E-mail: yazdanbakhsh

Hi, I am confused about the call to isPhyRegUsed in calculateCalleeSavedRegisters: if (Fn.getRegInfo().isPhysRegUsed(Reg)) { // If the reg is modified, save it! CSI.push_back(CalleeSavedInfo(Reg)); } It seems that isPhyRegUsed returns true if the register is read or written in the function. If this is right, why do we save a register if it is only read in the function ?? I would have

David Chisnall via llvm-dev <llvm-dev at lists.llvm.org> writes: > I'm not opposed to this in principle, and actually I'd quite like to > move in this direction and remove our reliance on undocumented and > inconsistent conventions between the back end and the front end for > conveying information about ABIs. For example, returning two 32-bit > integers or a pair of

I just added a new type of MachineOperand to the code generator: MO_RegisterMask. Register mask operands are used on machine instructions that clobber large sets of registers, typically calls. Instead of a long list of <imp-def> operands, a call now has a single <regmask> operand that contains a pointer to a bit mask of call-preserved registers. This reduces memory usage and improves

Section I. Overview Hello, About a half year ago there was some rumour on bugtraq concerning a buffer overflow in Linux dynamic linkers, ld.so and ld-linux.so. You can take a look at the beginning of the thread at http://www.geek-girl.com/bugtraq/1997_3/0089.html to refresh old memories; I''ll capitalize anyway. Briefly, there exists a buffer overrun in ld-linux.so versions 1.7.14,

On Tue, 12 Jun 2007, Fernando Magno Quintao Pereira wrote: > Imagine that I have a virtual v stored in register AL, and I am about > to cross a function call, that effectively overwrites AL. Well, I have, > say, register ESI free, but as it happens, ESI is bigger than AL. It > should be technically possible to move the contents of AL into ESI, to > avoid spilling 'v',

[correction] On May 20, 2008, at 1:45 PM, Marcel Moolenaar wrote: > All, > > The following IR is causing the assert: > > \begin{ll} > ; ModuleID = 'x.bc' > target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32- > i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64- > f80:128:128" > target triple =

On Tue, 20 May 2008, Marcel Moolenaar wrote: > On May 20, 2008, at 1:45 PM, Marcel Moolenaar wrote: >> The following IR is causing the assert: The issue here is that the IA64 backend doesn't have inline asm support yet. This should be pretty easy to add. Take a look at the X86 version: X86TargetLowering::getRegForInlineAsmConstraint it just maps "r" onto the GPR

On May 31, 2013, at 4:59 PM, Joe Matarazzo <joe.matarazzo at gmail.com> wrote: > I think the last time I pulled from trunk was probably end of last year. Some time ago. Does your reply intimate it's fixed on trunk? Yes, it’s been fixed recently. /jakob

from the SD / SelectionDAG form of a global-virt-reg, IE a CopyToReg or CopyFromReg where the Reg is a virtual-register (not a physical-register), I need to compute the set of all other global-virt-regs that this one is connected to through PHI nodes as the PHI nodes set up equivalence relations, I should be able to use ADT/EquivalenceClasses.h which seems to implement a generic Union-Find

Fix regs set/get decoding in VMXAssist. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Xin Li <xin.b.li@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

On May 31, 2013, at 4:07 PM, Joe Matarazzo <joe.matarazzo at gmail.com> wrote: > The register coalescer treats virtual super register classes -- a sequential register range composed of multiple hardware registers -- as a register with sub registers. When making coalescing decisions it thinks that the virtual super reg interferes with sub reg instances, even though in reality they

On Jan 23, 2009, at 3:28 AM, Mondada Gabriele wrote: > Hi, > I'm implementing storeRegToStackSlot() and, in order to store some > specific registers (floating point regs and address regs) I've to > copy them to more standard regs and copy these last ones to the slot. > I tried to generate instructions that use physical registers, but by > doing that I overwrote

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This is a feature I’m considering for the LLVM backend. Feel free to provide input in the following PR. llvm.org/pr19267 - Add a feature to clobber non-callee-save regs in the prolog. I’m copying llvm-dev because it seems like something that others must have already done or at least thought about at some point. -Andy

https://bugzilla.mindrot.org/show_bug.cgi?id=3645 Bug ID: 3645 Summary: -fzero-call-used-regs=used detection seems to fail on Linux ppc64el Product: Portable OpenSSH Version: 9.6p1 Hardware: PPC64 OS: Linux Status: NEW Severity: normal Priority: P5 Component: Build