similar to: Problem of getting two unused registers in eliminateFrameIndex()

Displaying 20 results from an estimated 100 matches similar to: "Problem of getting two unused registers in eliminateFrameIndex()"

2014 Oct 10
2
[LLVMdev] eliminateFrameIndex
Hi! I started writing a LLVM backend for a custom architecture. I have some register and instruction .td files and some other files/classes like a MCStreamer for assembler output. At the moment I can compile some empty programs so far. I implemented the method ::eliminateFrameIndex() similar to the Sparc and ARM backend. The method looks like this: // frame pointer is in reg of class
2019 May 03
2
LLVM Virtual registers after RA pass?
I need to use ‘createVirtualRegister’ for a specific case in my ‘eliminateFrameIndex’ function implementation. However, whenever that code is executed, I get the assertion "MachineCopyPropagation should be run after register allocation!” at a later stage. I have seen that at least a couple of backend implementations (including ARM Thumb) create virtual registers in ‘eliminatedFrameIndex’.
2015 Jan 30
2
[LLVMdev] creating a vreg in eliminateFrameIndex()
Thanks Jon and Hal for the helpful pointers. By returning true from requiresRegisterScavenging() and requiresFrameIndexScavenging(), LLVM handled all the scavenging effort. That is nearly painless for the target, so why do some targets seem to do scavenging on their own? When the scavenged register is loaded with a simple immediate, is it safe to search the BB and replace other uses of the same
2015 Jan 29
0
[LLVMdev] creating a vreg in eliminateFrameIndex()
On 1/29/15 2:00 PM, Steve King wrote: > Hello LLVM, > The ARM target sometimes adds an instruction with a virtual register > in eliminateFrameIndex(): > > https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp > > This looks late for a virtual register to appear. Where is this vreg made real? The register scavenger should take care of such
2015 Jan 29
3
[LLVMdev] creating a vreg in eliminateFrameIndex()
Hello LLVM, The ARM target sometimes adds an instruction with a virtual register in eliminateFrameIndex(): https://github.com/llvm-mirror/llvm/blob/master/lib/Target/ARM/ARMBaseRegisterInfo.cpp This looks late for a virtual register to appear. Where is this vreg made real? Thanks, -steve
2015 Jan 30
0
[LLVMdev] creating a vreg in eliminateFrameIndex()
----- Original Message ----- > From: "Steve King" <steve at metrokings.com> > To: jonathan at codesourcery.com > Cc: llvmdev at cs.uiuc.edu > Sent: Friday, January 30, 2015 10:52:19 AM > Subject: Re: [LLVMdev] creating a vreg in eliminateFrameIndex() > > Thanks Jon and Hal for the helpful pointers. By returning true from > requiresRegisterScavenging() and
2015 Jan 30
1
[LLVMdev] creating a vreg in eliminateFrameIndex()
On Fri, Jan 30, 2015 at 8:59 AM, Hal Finkel <hfinkel at anl.gov> wrote: >> When the scavenged register is loaded with a simple immediate, is it >> safe to search the BB and replace other uses of the same immediate >> with the reg? In my case this gives a code size reduction. The >> search would stop on finding another use of the scavenged register. > > Are you
2004 Jul 01
1
[LLVMdev] MRegisterInfo::eliminateFrameIndex
The docs for the above-mentioned function say: This method may modify or replace the specified instruction, as long as it keeps the iterator pointing the the finished product. What does it mean to "keep an interator". Was "invalidates the iterator" intended, so something else. Another question, is how do I really replace the instruction. The operator= is private
2011 Oct 10
0
[LLVMdev] Expected behavior of eliminateFrameIndex() on dbg_value machine instructions
On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: > I'm investigating a bug associated with debug information that manifests > itself in the XCore backend (PR11105). I'd like to understand what the > expected behavior of eliminateFrameIndex() is when it is called on a > dbg_value machine instruction. That is up to the target. The TII::emitFrameIndexDebugValue() hook is
2011 Oct 10
2
[LLVMdev] Expected behavior of eliminateFrameIndex() on dbg_value machine instructions
I'm investigating a bug associated with debug information that manifests itself in the XCore backend (PR11105). I'd like to understand what the expected behavior of eliminateFrameIndex() is when it is called on a dbg_value machine instruction. Currently the XCore target replaces the frame index with the frame register and sets the next operand to the byte offset from the frame
2017 Sep 26
0
[MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
> On Sep 26, 2017, at 2:39 PM, Geoff Berry via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi all, > > Mikael reported a machine verification failure in his out-of-tree target with the MachineCopyPropagation changes to forward registers (which is currently reverted). The verification in question is: > > *** Bad machine code: Multiple connected components in live
2017 Sep 26
2
[MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
On 9/26/2017 6:11 PM, Matthias Braun wrote: > >> On Sep 26, 2017, at 2:39 PM, Geoff Berry via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hi all, >> >> Mikael reported a machine verification failure in his out-of-tree target with the MachineCopyPropagation changes to forward registers (which is currently reverted). The verification in question is:
2017 Sep 26
0
[MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
> On Sep 26, 2017, at 3:33 PM, Geoff Berry <gberry at codeaurora.org> wrote: > > > > On 9/26/2017 6:11 PM, Matthias Braun wrote: >>> On Sep 26, 2017, at 2:39 PM, Geoff Berry via llvm-dev <llvm-dev at lists.llvm.org> wrote: >>> >>> Hi all, >>> >>> Mikael reported a machine verification failure in his out-of-tree target
2017 Sep 26
2
[MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
Hi all, Mikael reported a machine verification failure in his out-of-tree target with the MachineCopyPropagation changes to forward registers (which is currently reverted). The verification in question is: *** Bad machine code: Multiple connected components in live interval *** - function: utils_la_suite_matmul_ref - interval: %vreg77
2012 Feb 16
1
[LLVMdev] LLVM: MachineCopyPropagation.cpp
Hi, I have the following code: %a1<def> = COPY %a0<kill> ... %a0h<def> = COPY %a1l , as input to MachineCopyPropagation. The second copy is illegally erased! This is wrong, because it is the low part of a1 that is copied to the high part of a0. At a first glance, it seems that if (!ReservedRegs.test(Def) && (!ReservedRegs.test(Src) ||
2011 Oct 11
1
[LLVMdev] Expected behavior of eliminateFrameIndex() on dbg_value machine instructions
On 10/10/11 19:19, Jakob Stoklund Olesen wrote: > On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote: >> I'm investigating a bug associated with debug information that manifests >> itself in the XCore backend (PR11105). I'd like to understand what the >> expected behavior of eliminateFrameIndex() is when it is called on a >> dbg_value machine instruction. >
2017 Sep 27
2
[MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
On 9/26/2017 6:47 PM, Matthias Braun wrote: > >> On Sep 26, 2017, at 3:33 PM, Geoff Berry <gberry at codeaurora.org >> <mailto:gberry at codeaurora.org>> wrote: >> >> >> >> On 9/26/2017 6:11 PM, Matthias Braun wrote: >>>> On Sep 26, 2017, at 2:39 PM, Geoff Berry via llvm-dev >>>> <llvm-dev at lists.llvm.org
2017 Sep 27
0
[MachineCopyPropagation] Issue with register forwarding/allocation/verifier in out-of-tree target
> On Sep 26, 2017, at 8:24 PM, Geoff Berry via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On 9/26/2017 6:47 PM, Matthias Braun wrote: >>> On Sep 26, 2017, at 3:33 PM, Geoff Berry <gberry at codeaurora.org <mailto:gberry at codeaurora.org> <mailto:gberry at codeaurora.org <mailto:gberry at codeaurora.org>>> wrote: >>> >>>
2017 Sep 18
1
Resend: assertion in MachineCopyPropagation::isNopCopy
Hi, anyone know anything about copy propagation? Matthias, I see this was your code originally? Was there some assumptions you made? I'm hitting an assertion in MachineCopyPropagation::isNopCopy: if (Src == PreviousSrc) { assert(Def == PreviousDef); return true; } This code compares two COPY instruction to see whether they are effectively "the same". The assert assumes
2017 Oct 26
3
RFC: Adding bit to register MachineOperands to allow post-RA register renaming
Forgive me if these questions are naive or if I'm misunderstanding something. I'm certainly very interested in seeing the MachineCopyPropagation patch finally land and stick. 1. Wouldn't function live-ins and reserved registers have started life as physical registers already? For example, wouldn't a live-in be a copy from a physical register to a virtual one allowing the flag to