similar to: [PATCH v3 0/4] xen/arm: CONFIG_PARAVIRT and stolen ticks accounting

Hi all, this patch series introduces support for runstate_memory_area on ARM. The first patch moves VCPUOP_register_runstate_memory_area to common code, while the second one add VCPUOP_register_runstate_memory_area to the whilelist of vcpu_op hypercalls supported on ARM and properly updates the runstate_memory_area during vcpu context switch. Stefano Stabellini (2): xen: move

On Tue, 18 Jan 2005, John Cortes wrote: >> Can you say a little bit about MACH-SUIF? With a brief google search, I >> didn't turn up anything that described the architecture. Is it a RISC-like >> machine with 32-bit instruction words? >> > > It's another VM representation. I haven't really gotten to know the nitty > gritty of the language so

This patchset is ia64/xen domU patch take 11. Tony, please commit those patches. They are ready to commit because all the issues which were pointed out had been addressed and got enough reviews. This patchset does the followings. - Some preparation work. Mainly importing header files to define related structures. - Then, define functions related to hypercall which is the way to communicate

This patchset is ia64/xen domU patch take 11. Tony, please commit those patches. They are ready to commit because all the issues which were pointed out had been addressed and got enough reviews. This patchset does the followings. - Some preparation work. Mainly importing header files to define related structures. - Then, define functions related to hypercall which is the way to communicate

This patchset is ia64/xen domU patch take 12. Tony, please commit those patches. They are ready to commit because all the issues which were pointed out had been addressed and got enough reviews. This patchset does the followings. - Some preparation work. Mainly importing header files to define related structures. - Then, define functions related to hypercall which is the way to communicate

This patchset is ia64/xen domU patch take 12. Tony, please commit those patches. They are ready to commit because all the issues which were pointed out had been addressed and got enough reviews. This patchset does the followings. - Some preparation work. Mainly importing header files to define related structures. - Then, define functions related to hypercall which is the way to communicate

Chris Lattner wrote: > On Tue, 18 Jan 2005, John Cortes wrote: > >>> Can you say a little bit about MACH-SUIF? With a brief google >>> search, I didn't turn up anything that described the architecture. >>> Is it a RISC-like machine with 32-bit instruction words? >>> >> >> It's another VM representation. I haven't really gotten

Hi. This patchset implements ia64/xen domU support based on ia64/pv_ops frame work which was sent as another patchest. Changes from take 5 are rebased to Linux 2.6.26-rc3, bug fix ivt.S paravirtualization and multi entry point support. I believe these patches can be applied to the linux ia64 repository. This patchset does the followings. - Some preparation work. Mainly importing header files to

Hi. This patchset implements ia64/xen domU support based on ia64/pv_ops frame work which was sent as another patchest. Changes from take 5 are rebased to Linux 2.6.26-rc3, bug fix ivt.S paravirtualization and multi entry point support. I believe these patches can be applied to the linux ia64 repository. This patchset does the followings. - Some preparation work. Mainly importing header files to

Quentin, My real problem is that my target has separate address and data registers. The way I’d like to try getting better reg-alloc than I am now is to bring out the difference as Early as possible, so I have added p16, p32, p64 to the enum in “MachineValueType.h” And I have called addRegisterClass(MVT::p32, &XyzAddrRegsRegClass); And I have an override for virtual

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21-rc7 + your patches + the last batch of pv_ops patches I posted. This patch generally restricts itself to Xen-specific parts of the tree, though it does make a few small changes elsewhere. These patches include: - some helper routines for allocating address space and walking pagetables - Xen

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21-rc7 + your patches + the last batch of pv_ops patches I posted. This patch generally restricts itself to Xen-specific parts of the tree, though it does make a few small changes elsewhere. These patches include: - some helper routines for allocating address space and walking pagetables - Xen

I don’t quite follow why you are doing something like this. What is the advantage of this instead of just attaching the AddrRegs regsister class as the register class for your instruction? So that you would have an ADD instruction like %AddrRegOut = ADD %AddrRegIn1, %AddrRegIn2 What kind of problematic regalloc are you trying to avoid with introducing a new backend data type? Marcello > On

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21-git13 + patches-2.6.21-git7-070507-1.tar.gz (I think "unwinder" is the only patch which doesn't apply to git13, and the sched-clock patches are the only ones which this series actually needs). Changes since the last posting: - More netfront review and cleanup - Added ability to

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21-git13 + patches-2.6.21-git7-070507-1.tar.gz (I think "unwinder" is the only patch which doesn't apply to git13, and the sched-clock patches are the only ones which this series actually needs). Changes since the last posting: - More netfront review and cleanup - Added ability to

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21-git13 + patches-2.6.21-git7-070507-1.tar.gz (I think "unwinder" is the only patch which doesn't apply to git13, and the sched-clock patches are the only ones which this series actually needs). Changes since the last posting: - More netfront review and cleanup - Added ability to

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21 + 2.6.21-070428-1 + the patches I've posted over the last couple of days. Changes since the last posting: - update per review comments - comment each file - comment barrier use - use common cpu sibling setup - fixed a few minor bugs, specifically a traceirq mismatch warning - some

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21 + 2.6.21-070428-1 + the patches I've posted over the last couple of days. Changes since the last posting: - update per review comments - comment each file - comment barrier use - use common cpu sibling setup - fixed a few minor bugs, specifically a traceirq mismatch warning - some

The i32 class is defined in include/llvm/CodeGen/ValueTypes.td along with a class for every type in MachineValueTypes.h On Wed, May 25, 2016 at 8:12 PM, Marcello Maggioni via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I don’t quite follow why you are doing something like this. > > What is the advantage of this instead of just attaching the AddrRegs > regsister class as the

Hi Andi, This series of patches implements the Xen paravirt-ops interface. It applies to 2.6.21-git3 + ff patches-2.6.21-git3-070501-1.tar.gz. Changes since the last posting: - reviews of xenbus (me), netfront (hch, rusty, herbert xu) and blockfront (hch), with most comments addressed. Netfront review revealed a couple of real bugs, and the code for all three is looking cleaner