similar to: Re: [PATCH 6/9] tools: memshr: arm64 support

Displaying 20 results from an estimated 100 matches similar to: "Re: [PATCH 6/9] tools: memshr: arm64 support"

2012 Mar 28
0
[PATCH] tools/memshr: fix build errors caused by Werror
# HG changeset patch # User Olaf Hering <olaf@aepfle.de> # Date 1332942876 -7200 # Node ID d0fe664fca8a7e7db8b46b2f6c267acc88fa9c78 # Parent 4bd752a4cdf323c41c50f8cd6286f566d67adeae tools/memshr: fix build errors caused by Werror -O2 -Wall -Werror triggers these warnings: cc1: warnings being treated as errors interface.c: In function ''memshr_daemon_initialize'':
2012 Mar 28
1
Re: tools/memshr: fix build errors caused by Werror
> # HG changeset patch > # User Olaf Hering <olaf@aepfle.de> > # Date 1332942876 -7200 > # Node ID d0fe664fca8a7e7db8b46b2f6c267acc88fa9c78 > # Parent 4bd752a4cdf323c41c50f8cd6286f566d67adeae > tools/memshr: fix build errors caused by Werror > > -O2 -Wall -Werror triggers these warnings: > > cc1: warnings being treated as errors > interface.c: In function
2013 Mar 15
22
[PATCH 00/09] arm: tools: build for arm64 and enable cross-compiling for both arm32 and arm64
The following patches shave some rough edges off the tools build system to allow cross compiling for at least arm32 and arm64 based on the Debian/Ubuntu multiarch infrastructure. They also add the necessary fixes to build for arm64 (which I have only tried cross, not native). I have posted some instructions on how to compile with these patches on the wiki:
2012 Apr 02
23
[PATCH 00 of 18] [v2] tools: fix bugs and build errors triggered by -O2 -Wall -Werror
Changes: tools/blktap: remove unneeded pointer dereferencing in convert_dev_name_to_num tools/blktap: constify string arrays in convert_dev_name_to_num tools/blktap: fix params and physical-device parsing tools/blktap: remove unneeded pointer dereferencing from img2qcow.c tools/blktap: remove unneeded pointer dereferencing from qcow2raw.c tools/blktap2: fix build errors caused by Werror in
2015 Jun 15
2
OT: suggestion need on Sync in the windows way.
I agree, If the synology uid and gid is working right than nfs would be great. it would be easy... However, it seem that they have something else running under samba/nfs to control the permission on the files/folder... I would like to use bidir sync because I like some of the synology feature on remote sync and etc which is making remote access much easier compare to samba... But these sync
2015 Jun 15
0
OT: suggestion need on Sync in the windows way.
For bidirectional sync take a look at Unison (file synchronizer.) --- ------------------------- Bob Wooden of Donelson Trophy 615.885.2846 (main) www.donelsontrophy.com [1] "Everyone deserves an award!!" On 2015-06-15 01:04, Min Wai Chan wrote: > I agree, > If the synology uid and gid is working right than nfs would be great. it > would be easy... > However, it seem
2015 Jun 15
1
OT: suggestion need on Sync in the windows way.
Does Unision support ACL? If it would than this part guide would work. https://wiki.samba.org/index.php/SysVol_Bidirectional_Replication But it didn't.... On Mon, Jun 15, 2015 at 7:14 PM, Bob of Donelson Trophy < bob at donelsontrophy.net> wrote: > > > For bidirectional sync take a look at Unison (file synchronizer.) > > --- > > ------------------------- >
2017 May 30
3
[atomics][AArch64] Possible bug in cmpxchg lowering
Currently the AtomicExpandPass will lower the following IR: define i1 @foo(i32* %obj, i32 %old, i32 %new) { entry: %v0 = cmpxchg weak volatile i32* %obj, i32 %old, i32 %new _*release acquire*_ %v1 = extractvalue { i32, i1 } %v0, 1 ret i1 %v1 } to the equivalent of the following on AArch64: _*ldxr w8, [x0]*_ cmp w8, w1 b.ne .LBB0_3 // BB#1:
2012 Apr 10
0
[PATCH] blktap: build fix uncovered with c/s 25149
Fix build error uncovered with c/s 25149 when compiling tools w/o MEMSHR. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
2010 Jun 02
1
build xen4.0 fail in blktap2 module
uname -a:Linux DC26 2.6.30.10 #1 SMP Wed Jun 2 04:34:53 PDT 2010 i686 i686 i386 GNU/Linux OS:CentOS5.5 build xen #make all Errors: include -I../../../tools/libxc -I../../../tools/include -I ../../../tools/libaio/src -I ../../../tools/memshr -D_GNU_SOURCE -DUSE_NFS_LOCKS -DUSE_GCRYPT -c -o tapdisk-queue.o tapdisk-queue.c In file included from tapdisk-queue.c:44: libaio-compat.h:82:3:
2015 Jun 14
0
OT: suggestion need on Sync in the windows way.
Mount wontt be a solution since you'll force things to one uid/gid Why do you need bidir sync? Le 14/06/2015 20:01, Min Wai Chan a ?crit : > Hi Sebastien, > > Rsync is only one way right, any 2 way sync solution? > > Thank you. > > S?bastien Le Ray <sebastien-samba at orniz.org> ? 2015?6?15? ?????? > >> Hi >> >> rsync -a should be able to
2013 Jan 23
132
[PATCH 00/45] initial arm v8 (64-bit) support
First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I
2020 Feb 10
3
atomic ops are optimized with incorrect semantics .
Hi All, With the "https://gcc.godbolt.org/z/yBYTrd" case . the atomic is converted to non atomic ops for x86 like from xchg dword ptr [100], eax to mov dword ptr [100], 1 the pass is responsible for this tranformation was instCombine i.e InstCombiner::visitAtomicRMWInst which converts the IR like %0 = atomicrmw xchg i32* inttoptr (i64 100 to i32*), i32 1 monotonic to store
2013 Feb 22
48
[PATCH v3 00/46] initial arm v8 (64-bit) support
This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.
2014 Jul 17
2
[LLVMdev] [compiler-rt] CMake bug in building ARM builtins library
On 7/16/14, 6:09 PM, sgundapa wrote: > I see a couple of issues here. > > If I include .S files for ARM, the –no-integrated-as path complains about > Assembler errors. > > The integrated-as path works fine though. > These are very likely just differences between the old ARM assembler syntax and the new 'Unified' syntax. Can you use an assembler that accepts UAL
2011 Apr 03
6
Memory sharing
Hi, Currently i''m going through the source codes of tools/blktap2. I need to find-out where blktap2 calls 1. mem_share_nominate() 2. mem_sharing_share_page() functions to do the memory sharing on HVM guests. Can someone please provide me some guidance on blktap2 driver. Thanks, Harshan _______________________________________________ Xen-devel mailing list
2013 Nov 12
0
[klibc:master] arm64: Add arm64 support
Commit-ID: e4a2c914446ba907c5aaccf6ae1d089a09d21df7 Gitweb: http://git.kernel.org/?p=libs/klibc/klibc.git;a=commit;h=e4a2c914446ba907c5aaccf6ae1d089a09d21df7 Author: Steve Capper <steve.capper at linaro.org> AuthorDate: Mon, 11 Nov 2013 17:04:12 +0000 Committer: H. Peter Anvin <hpa at zytor.com> CommitDate: Mon, 11 Nov 2013 19:31:31 -0800 [klibc] arm64: Add arm64 support
2008 Mar 31
1
[05/17][PATCH] kvm/ia64 : Add head files for kvm/ia64
Hi Xiantao, More comments. Zhang, Xiantao wrote: >>From 696b9eea9f5001a7b7a07c0e58514aa10306b91a Mon Sep 17 00:00:00 2001 > From: Xiantao Zhang <xiantao.zhang at intel.com> > Date: Fri, 28 Mar 2008 09:51:36 +0800 > Subject: [PATCH] KVM:IA64 : Add head files for kvm/ia64 > > ia64_regs: some defintions for special registers > which aren't defined in
2008 Mar 31
1
[05/17][PATCH] kvm/ia64 : Add head files for kvm/ia64
Hi Xiantao, More comments. Zhang, Xiantao wrote: >>From 696b9eea9f5001a7b7a07c0e58514aa10306b91a Mon Sep 17 00:00:00 2001 > From: Xiantao Zhang <xiantao.zhang at intel.com> > Date: Fri, 28 Mar 2008 09:51:36 +0800 > Subject: [PATCH] KVM:IA64 : Add head files for kvm/ia64 > > ia64_regs: some defintions for special registers > which aren't defined in
2009 Dec 16
2
[LLVMdev] Early-clobber constraint in TableGen
All, I've attached a small patch that adds a new early-clobber operand constraint option to TableGen and would like to get feedback before proceding. As background, the ARM store-exclusive instruction (STREX) stores a success result code in a register operand, and that register cannot be the same register as either the source of the value to be stored, or the base address.