similar to: SVN Theora FPGA

Great news! Theora is running on FPGA. After almost a year of a great effort we have Theora validated on FPGA. Now I will try to integrated the hardware with a video controller to see the video! I completely implemented the ExpandBlock, CopyRecon, LoopFilter and UpdateUMVBorder functions. The ReconRefFrames function was partially implemented and the part before will run on a software compiled

Hi all, Great news. On Thursday I finally play a video on FPGA. As I said the implementation is using the NIOS II processor. Andr? Costa is hard working to use the LEON processor. The video resolution is 96x80, because we have some FPGA internal memory constraints. I will try to use external memory to make possible decode a video of at least 320x240. The result can be see here:

Hi all, I apologize to not keep you up to date to what is going on with my project. Portavales has worked in a desk behind me and when we go to take coffee we talk about the project. Second I didn't know we have to discuss weekly, it was my fault. I should have read the rules. Sorry. At the first month, I studied the code and the Theora Beta implementation. The code is completely different

What is the PostProcessingLevel field of PB_INSTANCE? When is it used? It is used for all Theora's video or it is just for legacy support with VP3? Thanks -- Leonardo de Paula Rosa Piga Undergraduate Computer Engineering Student LSC - IC - UNICAMP http://www.students.ic.unicamp.br/~ra033956

Shows that as the MCU increases, the OpenMP extra overhead is amortized and OpenMP becomes as fast as the pthreads implementation. The last chart http://lampiao.lsc.ic.unicamp.br/~piga/gsoc_2008/systime.png Shows that both pthreads and OpenMP overhead decreases as what seems to be a logarithmic function of the MCU size. This was a great experiment, and from what I can conclude, the OpenMP

Hi all, Does Theora Community have an interest in a multi-thread decoder implementation? I'm starting to work with multi-thread and I thought that Theora Decoder is a good choice for me, because I had been working with it in a FPGA implementation and I have experience with the library. I'm thinking in working with LoopFilter at first. Do you think I could start with it or there is a

Hi all, I have to compare the theora codec with MPEG and H264. I was googling and I found that the PSNR is a common used parameter. How can I do this with Theora? Thanks -- Leonardo de Paula Rosa Piga Undergraduate Computer Engineering Student LSC - IC - UNICAMP http://www.students.ic.unicamp.br/~ra033956

Hi, This email is to inform what I have been doing since the mid-term. After the mid-term I worked on a pipeline implementation with OpenMP. As I said before I did a pipelined implementation of these functions: (c_dec_dc_unpredict_mcu_plane + oc_dec_frags_recon_mcu_plane) and (oc_state_loop_filter_frag_rows + oc_state_borders_fill_rows) as explained in my previous email. But the results were

Hello, First of all, I would like to say that my work that I wrote in the other email would be to do in hardware the functions: CopyRecon, LoopFilter and UpdateUMVBorder. These are modules that Leonardo had made, but it wasn't ok in FPGA. When I had a chat with Leonardo we were thinking in rewrite these module for to do this running in FPGA (to debug in a Hardware level is much more

I have tried to add a plunging to the "libtheora-1.0beta2" (network bandwidth measuring component was added) and Got it success for some far now the problem is when it is added the encoding process get extremely slow (around 20 seconds delay). I think that the problem is with my modified Makefile (some flag may have missed). the following is my modified Makefile.am which is in the

Hello people My name is Felipe and I sent a proposal to the Google Summer of Code that the goal is to get a FPGA embeded system decoding Theora Streams in real-time. It was accepted and the mentor is the Ralph Giles. The proposal can be viewd here: http://atlas.lsc.ic.unicamp.br/~portavales/wp-content/uploads/2006/05/soc_proposal.txt There is also a presentation with a better division of the

Good news, Working with synchrounous RAM (fpga internal SRAM blocks) the area usage drop from 20% to 5% of Logic Cells. And the clock frequency from 30 Mhz to 90 Mhz. Now I'm improving the latency of samples (number of clock cycles needed to decode a data sample). Report: -------------- Fitter Status : Successful - Mon Jun 5 16:38:21 2006 Quartus II Version : 5.1 Build 176 10/26/2005 SJ

Hi people, As I said before: I did the IDCT to run on the FPGA. My friends from university did the Reconstruction routines running on the FPGA. I'm helping with the LoopFilter, and it is almost there. (all VHDL) I did a small profiling of the libTheora running on a Altera Stratix II device: The processor used was the NIOS II with 8Kb of data and instruction cache, branch prediction and

I have tried to add a plunging to the "libtheora-1.0beta2" (network bandwidth measuring component was added) and Got it success for some far now the problem is when it is added the encoding process get extremely slow (around 20 seconds delay). I think that the problem is with my modified Makefile (some flag may have missed). the following is my modified Makefile.am which is in the

Are there any academic papers that promote theora? I know of one, are there more? Universal Multimedia Access and Open Standards <http://www.t4p.no/t4p.no/conference/media/Vaaler.pdf> tom_a_sparks Please avoid sending me Word or PowerPoint attachments. but instead use OpenDocument File Formats or use OpenOffice http://en.wikipedia.org/wiki/OpenDocument

Hi all, Just a stupid question The IDctSlow function on file idct.c has this line : ip[0] = (ogg_int16_t)((_Gd + _Cd ) >> 0); The ip[0] , _Gd and _Cd are of type ogg_int32_t My question is: The result of (_Gd + _Cd) can be a number with more than 16 bits ? (yes, it can be because they are int32, but the algorithm could guarantee something about that... I dont know...) If

I'm trying to implement the dct_decoder's LoopFilter function in a FPGA. I need to know what is the maximum memory allocation size which display_fragment and recon_pixel_index_table points. These are fields of PB_INSTANCE structure that is declared in the codec_internal.h Thank you =========================== Leonardo de Paula Rosa Piga Computer Engineering Student Universidade

Hello, I'm happy to announce I developed a Multi-Threaded version of the Theora encoder. I changed the Motion Vector Search part of the algorithm to be executed in parallel. I've chosen the Motion search part after a careful set of profilings that shown that the Motion Vector Search is responsible by 70% of CPU-time on average and up to 95% of CPU-time in some cases. I also have chosen

Hi, Is somewhere alghorithm description of encoder process implemented in libtheora? May be some drafts? May be frame dataflow throw encoder stages? PLEASE -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/theora/attachments/20110318/c3e8e109/attachment.htm

Dear Theora/Xiph folk, * FOSS Codecs for Online Video: Usability, Uptake and Development - First Draft* A review of available tools for the creation, playback and embedding of online video using Free and Open Source Software video codecs and a look at the most pressing areas for development to enhance their adoption by social change video projects on the web.