similar to: How does "apply.monthly" function works (xts package)

Displaying 20 results from an estimated 1000 matches similar to: "How does "apply.monthly" function works (xts package)"

2008 Jul 10
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Cool, that worked. New patch attached... Cheers, Gary Evan Cheng wrote: > Just cast both values to const TargetRegisterClass*. > > Evan > > On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > > Evan Cheng wrote: > > > How about? > > > > > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > > > &PPC:G8RCRegClass; >
2009 Sep 09
10
dtrace overhead and proper measuring technique
I''m trying to time a function within Firefoxwith a pid$target probe [2]. e.g dtrace -Zqw -x dynvarsize=64m -x evaltime=preinit -p 13954 -s menu- construct.d -s sigcont.d elapsed: 12.7942481ms cpu : 7.7911194ms count : 40 times I''m also measuring Firefox startup time by running it arguments like this: ... file:///Users/joelr/work/mozilla/startup/startup.html#`python
2008 Sep 02
0
[LLVMdev] Instruction MVT::ValueTypes
On Sep 2, 2008, at 10:42 AM, David Greene wrote: > Is there an easy way to get the MVT::ValueType of a MachineInstruction > MachineOperand? For example, the register operand of an x86 MOVAPD > should > have an MVT::ValueType of v2f64. A MOVAPS register operand should > have an > MVT::ValueType of v4f32. The short answer is no. A op of a number of different VTs can map to
2009 Aug 24
1
[LLVMdev] [llvm-commits] [llvm] r79731 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
On Aug 24, 2009, at 1:32 AM, Duncan Sands wrote: > unfortunately, race detectors like helgrind don't like this kind of > thing, and report it as a race. Last time I asked about it I was > told that fixing it would be too hard/expensive. I know, and it's somewhat unfortunate. However, this path is extremely hot in LLC, and was significantly contended using only two threads. I
2012 Apr 27
0
[LLVMdev] MemRefs in a Load Instruction
> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Pranav Bhandarkar > Sent: Thursday, April 26, 2012 5:24 PM > To: llvmdev at cs.uiuc.edu > Subject: [LLVMdev] MemRefs in a Load Instruction > > Hi, > > On the hexagon target, I have written a following combiner pattern. >
2008 Sep 03
3
[LLVMdev] Instruction MVT::ValueTypes
On Tuesday 02 September 2008 16:47, Evan Cheng wrote: > On Sep 2, 2008, at 10:42 AM, David Greene wrote: > > Is there an easy way to get the MVT::ValueType of a MachineInstruction > > MachineOperand? For example, the register operand of an x86 MOVAPD > > should > > have an MVT::ValueType of v2f64. A MOVAPS register operand should > > have an > >
2009 Jul 31
4
[LLVMdev] RFC: SDNode Flags
Right now the MemSDNode keeps a volatile bit in the SubclassData to mark volatile memory operations. We have some changes we'd like to push back that adds a NonTemporal flag to MemSDNode to mark instructions where movnt (on x86) and other goodness can happen (we'll also add the TableGen patterns to properly select movnt). In our tree we simply added another flag to the MemSDNode
2016 Jan 15
2
Expanding a PseudoOp and accessing the DAG
On 1/15/2016 2:57 PM, Phil Tomson wrote: > > > I see the following in my SelectCode (in XSTGGenDGISel.inc): > > > /*2235*/ OPC_SwitchOpcode /*2 cases */, 27, > TARGET_VAL(XSTGISD::ADDR_NORMAL),// ->2266 > /*2239*/ OPC_RecordChild0, // #1 = $addr > /*2240*/ OPC_MoveChild, 0, > /*2242*/ OPC_CheckOpcode,
2009 Jun 23
3
subset POSIXct
Hi, I have a data frame with two columns: dt and tf. The dt column is datetime and the tf column is a temperature. dt tf 1 2009-06-20 00:53:00 73 2 2009-06-20 01:08:00 73 3 2009-06-20 01:44:00 72 4 2009-06-20 01:53:00 71 5 2009-06-20 02:07:00 72 ... I need a subset of the rows where the minutes are 53. The hour is immaterial. I can not find a wildcard
2011 May 28
1
How to do operations on zoo/xts objects with Monthly and Daily periodicities
Is there an elegant way to do operations (+/-/*/ / ) on zoo/xts objects when one serie is monthly (end of month) and the other daily (weekdays only) - typically a monthly economic indicator and a stock index price? Thanks, TDB -- View this message in context: http://r.789695.n4.nabble.com/How-to-do-operations-on-zoo-xts-objects-with-Monthly-and-Daily-periodicities-tp3558081p3558081.html
2010 Apr 18
4
confused with yearmon, xts and maybe zoo
R-listers, I am using xts with a yearmon index, but am getting some inconsistent results with the date index when i drop observations (for example by using na.omit). The issue is illustrated in the example below. If I start with a monthly zooreg series starting in 2009, yearmon converts this to "Dec-2008". Not such a worry for my example, but strange. Having converted to xts, i drop
2012 Apr 23
2
subset daily to monthly in a zoo or xts
Dear R users, I want to subset a daily zoo series according to its month, find % of "NA" in each month. I am finding it difficult to subset the daily dataset into monthly for the given operation.I am planning to do this for a huge dataset. Thanks in advance. Regards Vikram [[alternative HTML version deleted]]
2018 Nov 03
2
Red Hat is Planning To Deprecate KDE on RHEL By 2024
On 03/11/18 02:31, Robert Heller wrote: <snip> > Yeah, there are very few of us that completely skipped > MS-DOS/MS-Windows/MacOS-Clasic and *never* used a graphical file manager or > any of the eye-candy that people now believe is "standard" or "normal". I > went from VMS on a VT<whatever> to a VAXStation 2000 to a VAXStation 3000, to >
2009 Sep 09
4
usdt probes vs pid$target
I added a couple of static probes to Firefox to measure actual work done. I could have used a pid$target probe with a function name but work is done within an if statement, which is where I placed the static probes. I''m wondering about my use, though. Is the following significantly more efficient than pid$target::FunName:entry and return? I heard somewhere that $target does not
2014 Dec 04
3
What is the "not supported" hardware?
When the installer complains that it has detected unsupported hardware, is there any way to tell just what it didn't like? Following the URL in the message just ends up at the RHEL Hardware Certification page, which isn't much help. The installer seemed quite willing to continue with the installation, and poking around from the shell VT I didn't find anything that didn't seem to
2016 Mar 28
0
RFC: atomic operations on SI+
On Fri, Mar 25, 2016 at 02:22:11PM -0400, Jan Vesely wrote: > Hi Tom, Matt, > > I'm working on a project that needs few coherent atomic operations (HSA > mode: load, store, compare-and-swap) for std::atomic_uint in HCC. > > the attached patch implements atomic compare and swap for SI+ > (untested). I tried to stay within what was available, but there are > few issues
2008 Jul 11
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Hi Evan, Evan Cheng wrote: > This does not patch cleanly for me (PPCISelLowering.cpp). Can you > prepare a updated patch? This should work, though I won't have access to my test box now until next Thursday so no guarantees :) Cheers, Gary -- http://gbenson.net/ -------------- next part -------------- Index: lib/Target/PowerPC/PPCISelLowering.h
2008 Jul 08
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
PPCTargetLowering::EmitInstrWithCustomInserter has a reference to the current MachineFunction for other purposes. Can you use MachineFunction::getRegInfo instead? Dan On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: > Would it be acceptable to change MachineInstr::getRegInfo from private > to public so I can use it from > PPCTargetLowering::EmitInstrWithCustomInserter? > >
2008 Jul 11
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Hi Gary, This does not patch cleanly for me (PPCISelLowering.cpp). Can you prepare a updated patch? Thanks, Evan On Jul 10, 2008, at 11:45 AM, Gary Benson wrote: > Cool, that worked. New patch attached... > > Cheers, > Gary > > Evan Cheng wrote: >> Just cast both values to const TargetRegisterClass*. >> >> Evan >> >> On Jul 10, 2008, at 7:36
2008 Jul 10
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Just cast both values to const TargetRegisterClass*. Evan On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > Evan Cheng wrote: >> How about? >> >> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : >> &PPC:G8RCRegClass; >> unsigned TmpReg = RegInfo.createVirtualRegister(RC); > > I tried something like that yesterday: > > const