similar to: [PATCH] nvc0: Add and enable vblank support

Regression from "WIP: port to new libdrm". --- src/nv50_accel.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/src/nv50_accel.c b/src/nv50_accel.c index 66d6cb8..7c640f2 100644 --- a/src/nv50_accel.c +++ b/src/nv50_accel.c @@ -44,6 +44,9 @@ NV50SyncToVBlank(PixmapPtr ppix, BoxPtr box) if (!crtcs) return; + if (!PUSH_SPACE(push, 10)) + return; +

Few comments below. On 10/16/2016 09:14 PM, Ilia Mirkin wrote: > This flips GM10x to using the updated format, which is what I tested > with. However GM20x and GP10x also use this TIC format. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nvc0_accel.c | 11 ++++++++++ > src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ >

With this patch the DDX almost works with GK20A, the missing piece is adding COHERENT mappings to the right places. ;-) If you specify NOUVEAU_BO_APER the kernel will truncate valid_domains to the domains specified at creation time. This means that as long as we only specify the correct domain in nouveau_allocate_surface the effect is still the same. Signed-off-by: Maarten Lankhorst <dev at

Are you sure this refactoring doesn't break anything? Few comments inline. On 10/27/2016 04:02 PM, Ilia Mirkin wrote: > This flips GM10x to using the updated format, which is what I tested > with. However GM20x and GP10x also use this TIC format. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nvc0_accel.c | 11 ++++++++++ > src/nvc0_accel.h |

I believe I've addressed all the feedback from the first time around, and also made fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update

--- src/drmmode_display.c | 29 +++++++++++++++++-- src/nouveau_hw.h | 17 +++++++++++ src/nv_cursor.c | 74 ++++++++++++++++++++++++------------------------ src/nv_proto.h | 2 + 4 files changed, 82 insertions(+), 40 deletions(-) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index f2fe0e8..7acddf1 100644 --- a/src/drmmode_display.c +++

rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to work. Very lightly tested. Instead of sticking coordinates into pushbufs, the vertex shader is modified to read them from a constbuf, indexed by vertex id. This approach could be used for all nvc0 generations, but I didn't want to rock the boat. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Note: this

Revised patch set v2. [PATCH 1/8] drm/nouveau: bo read/write wrappers for nv04_crtc.c [PATCH 2/8] drm/nouveau: use bo accessors for push buffers [PATCH 3/8] drm/nouveau: OUT_RINGp - optimize OUT_RING loops [PATCH 4/8] drm/nv50: proper notifier_bo access in nv50_display_vblank_crtc_handler() [PATCH 5/8] drm/nouveau: access fbcon notifier via bo accessors [PATCH 6/8] drm/nouveau: screen_base and

These are copied directly from the mesa repository. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++ src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++---------------- 2 files changed, 892 insertions(+), 340 deletions(-) create mode 100644 src/hwdefs/gm107_texture.xml.h diff --git

Introduce accessors for TTM buffer object memory that has been mapped into the kernel virtual address space or as IO memory. IO memory needs to be accessed via special accessor functions, not by dereferencing the iomem cookie. The wrappers hide the details of 32-bit access and honour the TTM map type. nv04_crtc_cursor_set() is changed to use the new wrappers. 'cursor' is received from

Hi, here a set of patches against the nouveau-ddx. This is an extended and revised set, based on Francisco Jerez feedback from autumn last year. [1/9] Makes pageflipping work again on X-Server 1.12rc. It apparently stopped working somewhere around Xorg 1.11+. [2/9] Implements handling of pageflip completion events from the kernel. Francisco Jerez argument against including it was that the

This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 22 ++++--------------- src/nvc0_xv.c | 67

This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 23 ++++--------------- src/nvc0_xv.c | 67

On Mon, Oct 17, 2016 at 5:46 AM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Few comments below. > > On 10/16/2016 09:14 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format. >> >> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

0xc0b5 is not in rnndb, I guess it should be GP100_COPY, right? Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com> On 10/27/2016 04:02 PM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nouveau_copy.c | 2 ++ > src/nvc0_accel.c | 10 +++++++++- > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git

For now pixmaps will only be tiled if driver pixmaps are being used and we're told to with the NOUVEAU_CREATE_PIXMAP_TILED usage hint. Signed-off-by: Francisco Jerez <currojerez at riseup.net> --- src/nouveau_exa.c | 31 ++++++++++++++++++++----------- src/nv50_exa.c | 6 +++--- src/nv50_xv.c | 2 +- src/nv_proto.h | 2 +- src/nv_type.h | 1 + 5 files

- Only for sufficiently new xserver's and exa_driver_pixmaps. --- src/nouveau_exa.c | 217 +++++++++++++++++++++++++++++++++++++++++++++++++++-- src/nv_driver.c | 51 +++++++++++-- src/nv_proto.h | 4 + src/nv_type.h | 12 +++- 4 files changed, 267 insertions(+), 17 deletions(-) diff --git a/src/nouveau_exa.c b/src/nouveau_exa.c index 93fc3c5..074a226 100644 ---

- This is not yet a generic implementation that will work everywhere, but it's a start. - This will fix the corruption surrounding pixmap/texture bo moves on nv50. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 8 ++- drivers/gpu/drm/nouveau/nouveau_channel.c | 9 ++- drivers/gpu/drm/nouveau/nouveau_dma.c | 26

- Depth and stencil buffers are supposed to be large enough in general. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- drivers/gpu/drm/nouveau/nouveau_bo.c | 9 ++++----- 1 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index e342a41..9fc4bd6 100644 ---

On Thu, Oct 27, 2016 at 1:19 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Are you sure this refactoring doesn't break anything? > > Few comments inline. > > > On 10/27/2016 04:02 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format.