Displaying 20 results from an estimated 200 matches similar to: "[PATCH] drm/nouveau: initialize chan->fence.lock before use"
2012 Apr 25
5
[PATCH v2 4/4] drm/nouveau: gpu lockup recovery
Overall idea:
Detect lockups by watching for timeouts (vm flush / fence), return -EIOs,
handle them at ioctl level, reset the GPU and repeat last ioctl.
GPU reset is done by doing suspend / resume cycle with few tweaks:
- CPU-only bo eviction
- ignoring vm flush / fence timeouts
- shortening waits
Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com>
---
2012 Apr 22
2
[RFC PATCH 5/5] drm/nouveau: gpu lockup recovery
Overall idea:
Detect lockups by watching for timeouts (vm flush / fence), return -EIOs,
handle them at ioctl level, reset the GPU and repeat last ioctl.
GPU reset is done by doing suspend / resume cycle with few tweaks:
- CPU-only bo eviction
- ignoring vm flush / fence timeouts
- shortening waits
Signed-off-by: Marcin Slusarz <marcin.slusarz at gmail.com>
---
Tested only on nv92.
---
2009 Aug 26
1
[PATCH] drm/nouveau: init some list_heads
- In the case of nvbo->head it is really important to avoid an OOPS if ttm_buffer_object_init fails.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com>
---
 drivers/gpu/drm/nouveau/nouveau_bo.c      |    2 ++
 drivers/gpu/drm/nouveau/nouveau_channel.c |    1 +
 drivers/gpu/drm/nouveau/nouveau_object.c  |    1 +
 3 files changed, 4 insertions(+), 0 deletions(-)
diff --git
2009 Aug 04
5
[PATCH 1/6] drm/nouveau: bo read/write wrappers for nv04_crtc.c
Introduce accessors for TTM buffer object memory that has been mapped
into the kernel virtual address space or as IO memory. IO memory needs
to be accessed via special accessor functions, not by dereferencing the
iomem cookie. The wrappers hide the details of 32-bit access and honour
the TTM map type.
nv04_crtc_cursor_set() is changed to use the new wrappers. 'cursor' is
received from
2009 Dec 25
1
[PATCH] drm/nv50: synchronize user channel after buffer object move on kernel channel
- This is not yet a generic implementation that will work everywhere, but it's
a start.
- This will fix the corruption surrounding pixmap/texture bo moves on nv50.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com>
---
 drivers/gpu/drm/nouveau/nouveau_bo.c      |    8 ++-
 drivers/gpu/drm/nouveau/nouveau_channel.c |    9 ++-
 drivers/gpu/drm/nouveau/nouveau_dma.c     |   26
2009 Aug 17
8
drm bo accessors etc. v2
Revised patch set v2.
[PATCH 1/8] drm/nouveau: bo read/write wrappers for nv04_crtc.c
[PATCH 2/8] drm/nouveau: use bo accessors for push buffers
[PATCH 3/8] drm/nouveau: OUT_RINGp - optimize OUT_RING loops
[PATCH 4/8] drm/nv50: proper notifier_bo access in nv50_display_vblank_crtc_handler()
[PATCH 5/8] drm/nouveau: access fbcon notifier via bo accessors
[PATCH 6/8] drm/nouveau: screen_base and
2009 Dec 27
3
[PATCH 1/2] drm/nv50: align size of buffer object to the right boundaries.
- Depth and stencil buffers are supposed to be large enough in general.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com>
---
 drivers/gpu/drm/nouveau/nouveau_bo.c |    9 ++++-----
 1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index e342a41..9fc4bd6 100644
---
2009 Sep 17
1
[PATCH 1/3] drm/nouveau: change channel regs mapping to ioremap
Use ioremap() for mapping the channel user regs (that are never exposed
to user space) instead of drm_addmap().
This removes the last use cases of drm_addmap/drm_rmmap from Nouveau.
Signed-off-by: Pekka Paalanen <pq at iki.fi>
---
 drivers/gpu/drm/nouveau/nouveau_channel.c |   13 ++++++-------
 drivers/gpu/drm/nouveau/nouveau_drv.h     |    9 +++------
2009 Dec 26
2
[PATCH 1/3] drm/nouveau: Allocate a per-channel instance of NV_SW.
It will be useful for various synchronization purposes, mostly stolen
from "[PATCH] drm/nv50: synchronize user channel after buffer object
move on kernel channel" by Maarten Maathuis.
Signed-off-by: Francisco Jerez <currojerez at riseup.net>
---
 drivers/gpu/drm/nouveau/nouveau_channel.c |    4 +++-
 drivers/gpu/drm/nouveau/nouveau_dma.c     |   17 +++++++++++++++++
2010 May 31
2
[PATCH] drm/nouveau: reduce usage of fence spinlock to when absolutely necessary
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
 drivers/gpu/drm/nouveau/nouveau_channel.c |    2 --
 drivers/gpu/drm/nouveau/nouveau_drv.h     |    1 -
 drivers/gpu/drm/nouveau/nouveau_fence.c   |   28 ++++------------------------
 drivers/gpu/drm/nouveau/nv04_graph.c      |    1 -
 4 files changed, 4 insertions(+), 28 deletions(-)
diff
2009 Dec 19
1
[PATCH] drm/nouveau: always do buffer object moves on bo->channel
- Use the "direct" objects that previously only the kernel fifo had.
- This avoids corruption on some buffer moves.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com>
---
 drivers/gpu/drm/nouveau/nouveau_bo.c     |   23 ++---------------
 drivers/gpu/drm/nouveau/nouveau_object.c |   36 ++++++++++++++++++++++++++++
 drivers/gpu/drm/nouveau/nouveau_state.c  |   38
2010 Feb 07
3
[PATCH] drm/nouveau: don't hold spin lock while calling kzalloc with GFP_KERNEL
- 'joi' on irc pointed out that this triggers a BUG_ON, because kzalloc could
sleep.
- The irq handler should restore the value NV03_PFIFO_CACHES, but still it's
better if this stuff doesn't happen in the middle of fifo create context. I see
no reason in spin locking pgraph create context, it isn't activated at that
stage.
- Move and rename the lock after some discussion with
2013 Apr 08
1
[PATCH] drm/nouveau: idle all channels before suspending
Seems to make suspend slightly more reliable on my system.
Cc: stable at vger.kernel.org [3.7+]
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index b6bdc9f..5032c31 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -464,6
2015 Dec 08
2
[mesa v2 8/9] nvc0: remove allocation of unused sw class
NACK.
This patches breaks MP performance counters on Fermi/Kepler because they 
actually use software methods to configure multiplexers. Global perf 
counters will also use software methods to init, sample and read 
hardware counters, so this SW object is definitely needed.
Instead of removing it, we need to do something like that:
http://paste.awesom.eu/EQeX
Thanks.
On 11/27/2015 02:05 AM,
2012 Jul 27
1
[PATCH] nvc0: Add and enable vblank support
Based on the original patch by Christoph Bumiller, but since
it depends on kernel support patched I cannot push it yet.
The changes are that I enable vblank by default, and offset
takes OFFSET_HIGH/LOW instead of something relative to notifier_bo.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
diff --git a/man/nouveau.man b/man/nouveau.man
index 7c72907..8765569
2023 May 26
2
[PATCH v2] drm/nouveau: bring back blit subchannel for pre nv50 GPUs
1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128
was important as otherwise the GPU spams us with `CACHE_ERROR` messages.
We use the blit subchannel inside our vblank handling, so we should keep
at least this part.
v2: Only do it for NV11+ GPUs
Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/201
Fixes: 4a16dd9d18a0 ("drm/nouveau/kms: switch to drm fbdev
2023 May 26
1
[PATCH v2] drm/nouveau: bring back blit subchannel for pre nv50 GPUs
On Fri, May 26, 2023 at 5:11?AM Karol Herbst <kherbst at redhat.com> wrote:
>
> 1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128
> was important as otherwise the GPU spams us with `CACHE_ERROR` messages.
>
> We use the blit subchannel inside our vblank handling, so we should keep
> at least this part.
>
> v2: Only do it for NV11+ GPUs
>
>
2015 Nov 27
0
[mesa v2 8/9] nvc0: remove allocation of unused sw class
From: Ben Skeggs <bskeggs at redhat.com>
This would need to be fixed before NVIF can be switched on, but since we
don't use it anyway, just remove it.
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 8 --------
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.h | 1 -
 2 files changed, 9 deletions(-)
diff --git
2015 Dec 16
0
[mesa v3 8/9] nvc0: remove use of deprecated sw class identifier
From: Ben Skeggs <bskeggs at redhat.com>
Also emits a method to properly bind the class to a subchannel, which
was missing previously.  The kernel currently doesn't care, but this
will break if it ever decides to (ie. to support multiple sw classes).
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 8 +++++---
 1 file changed,
2023 May 15
0
[PATCH] drm/nouveau: bring back blit subchannel for pre nv50 GPUs
1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128
was important as otherwise the GPU spams us with `CACHE_ERROR` messages.
We use the blit subchannel inside our vblank handling, so we should keep
at least this part.
Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/201
Fixes: 4a16dd9d18a0 ("drm/nouveau/kms: switch to drm fbdev helpers")
Signed-off-by: