similar to: [PATCH] nv10/exa: Spring-cleaning

Displaying 20 results from an estimated 90 matches similar to: "[PATCH] nv10/exa: Spring-cleaning"

2009 Apr 08
0
[PATCH/Gallium] nv50: update nv50_clear to new interface
Commit eb168e26aa63f11a47d70c4555cae30691a2cd57 changed the way pipe->clear works so I figured I'd try to make an updated version, so below is the diff - my concerns/uncertainties should be contained in the comments. Or maybe you want to do it the way NV40 does it, just calling surface_fill through a utility function (althoug this does currently seem to only clear one color buffer) .
2009 Dec 30
4
[PATCH 1/3] nv50: remove vtxbuf stateobject after a referenced vtxbuf is mapped
- This avoids problematic "reloc'ed while mapped" messages and some associated corruption as well. Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- src/gallium/drivers/nouveau/nouveau_screen.c | 21 +++++++++++++++++++++ src/gallium/drivers/nouveau/nouveau_screen.h | 3 +++ src/gallium/drivers/nouveau/nouveau_stateobj.h | 13 +++++++++++++
2009 Nov 05
6
Some cosmetic NV10TCL method changes.
The attached patch does the cosmetic renouveau.xml changes I proposed. I'm about to reply myself with some other patches to update libdrm and then fix the API break up. -------------- next part -------------- A non-text attachment was scrubbed... Name: rename_some_nv10tcl_methods.patch Type: text/x-diff Size: 2507 bytes Desc: not available Url :
2010 Apr 20
1
[PATCH] nv30/exa : cleanup from nv40 exa
This has two purposes : - cleaner code - reduce the diff between nv30 and nv40 exa for a possible nvfx_exa merge ? The main differences seem to be that nv30 uses rect texture format (and does not support repeat on that). Then there are some minor changes in TX_FORMAT RT_FORMAT and TEX_FILTER usage. And NVAccelInitNVx0TCL look complete different. Tested with: ./rendercheck -t
2014 Aug 10
3
[PATCH 1/4] exa/nv10: use same clip settings as mesa driver
The higher 0x800 was getting overwritten by the 0x7ff anyways, so it wasn't doing any good. The mesa driver just uses 0x800 for the low portion and doesn't set the 8 bit in the higher portion, so do the same thing here. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nv10_exa.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/nv10_exa.c
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
Are you sure this refactoring doesn't break anything? Few comments inline. On 10/27/2016 04:02 PM, Ilia Mirkin wrote: > This flips GM10x to using the updated format, which is what I tested > with. However GM20x and GP10x also use this TIC format. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nvc0_accel.c | 11 ++++++++++ > src/nvc0_accel.h |
2010 May 31
1
[PATCH] nv50/exa: use dual-source blending for component-alpha composite
From: Ben Skeggs <bskeggs at redhat.com> --- src/nv50_accel.c | 38 ++++++++------------------------------ src/nv50_accel.h | 1 - src/nv50_exa.c | 45 ++++++++++++++++++++------------------------- 3 files changed, 28 insertions(+), 56 deletions(-) diff --git a/src/nv50_accel.c b/src/nv50_accel.c index 1218e18..db8c744 100644 --- a/src/nv50_accel.c +++ b/src/nv50_accel.c @@
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 23 ++++--------------- src/nvc0_xv.c | 67
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
On Thu, Oct 27, 2016 at 1:19 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Are you sure this refactoring doesn't break anything? > > Few comments inline. > > > On 10/27/2016 04:02 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format.
2009 Dec 11
2
[PATCH 1/2] exa: Pre-G80 tiling support.
For now pixmaps will only be tiled if driver pixmaps are being used and we're told to with the NOUVEAU_CREATE_PIXMAP_TILED usage hint. Signed-off-by: Francisco Jerez <currojerez at riseup.net> --- src/nouveau_exa.c | 31 ++++++++++++++++++++----------- src/nv50_exa.c | 6 +++--- src/nv50_xv.c | 2 +- src/nv_proto.h | 2 +- src/nv_type.h | 1 + 5 files
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
Few comments below. On 10/16/2016 09:14 PM, Ilia Mirkin wrote: > This flips GM10x to using the updated format, which is what I tested > with. However GM20x and GP10x also use this TIC format. > > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nvc0_accel.c | 11 ++++++++++ > src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ >
2010 Jan 03
0
[PATCH] exa: Some compat defines for new pixman formats.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- src/nv50_exa.c | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/src/nv50_exa.c b/src/nv50_exa.c index 10a3a64..59c198f 100644 --- a/src/nv50_exa.c +++ b/src/nv50_exa.c @@ -431,6 +431,26 @@ NV50EXAUploadSIFC(const char *src, int src_pitch, return TRUE; } +/* Compat defines for pre
2016 Oct 16
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 22 ++++--------------- src/nvc0_xv.c | 67
2016 Oct 17
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
On Mon, Oct 17, 2016 at 5:46 AM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Few comments below. > > On 10/16/2016 09:14 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format. >> >> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
2010 Apr 20
0
[PATCH] nv10/exa : demagify tex and rt format
Signed-off-by: Xavier Chantry <chantry.xavier at gmail.com> --- src/nv10_exa.c | 35 +++++++++++++++++++---------------- 1 files changed, 19 insertions(+), 16 deletions(-) diff --git a/src/nv10_exa.c b/src/nv10_exa.c index 1acb583..23a68e3 100644 --- a/src/nv10_exa.c +++ b/src/nv10_exa.c @@ -34,30 +34,33 @@ static struct pict_format { int exa; int hw; } nv10_tex_format_pot[] = { - {
2015 Mar 14
1
[PATCH ddx] Add support for VRAM-less devices to the ddx
With this patch the DDX almost works with GK20A, the missing piece is adding COHERENT mappings to the right places. ;-) If you specify NOUVEAU_BO_APER the kernel will truncate valid_domains to the domains specified at creation time. This means that as long as we only specify the correct domain in nouveau_allocate_surface the effect is still the same. Signed-off-by: Maarten Lankhorst <dev at
2010 Jan 03
0
[PATCH] exa: Some compat defines for depth 30 formats.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com> --- src/nv50_exa.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/src/nv50_exa.c b/src/nv50_exa.c index 10a3a64..c558896 100644 --- a/src/nv50_exa.c +++ b/src/nv50_exa.c @@ -431,6 +431,14 @@ NV50EXAUploadSIFC(const char *src, int src_pitch, return TRUE; } +/* Compat defines for pre 1.7 xservers.
2013 Apr 30
1
[Bug 64074] New: Mesalib Installation Error
https://bugs.freedesktop.org/show_bug.cgi?id=64074 Priority: medium Bug ID: 64074 Assignee: nouveau at lists.freedesktop.org Summary: Mesalib Installation Error Severity: normal Classification: Unclassified OS: All Reporter: andree.tago at gmail.com Hardware: Other Status: NEW
2010 Jan 29
2
[PATCH 1/2] libdrm/nouveau: new optimized libdrm pushbuffer ABI
This patch changes the pushbuffer ABI to: 1. No longer use/expose nouveau_pushbuffer. Everything is directly in nouveau_channel. This saves the extra "pushbuf" pointer dereference. 2. Use cur/end pointers instead of tracking the remaining size. Pushing data now only needs to alter cur and not both cur and remaining. The goal is to make the *_RING macros faster and make the
2010 Jan 03
3
Latest xf86-video-nouveau does not compile
Hi, latest 2D driver does not compile. libdrm and Mesa are latest git... Johannes CC nv50_exa.lo nv50_exa.c: In function 'NV50EXACheckRenderTarget': nv50_exa.c:451: error: 'PICT_a2b10g10r10' undeclared (first use in this function) nv50_exa.c:451: error: (Each undeclared identifier is reported only once nv50_exa.c:451: error: for each function it appears in.) nv50_exa.c:452: