similar to: [PATCH] nv50/gallium: use SIFC to upload to TIC/TSC

Add proper flushes for TIC and TSC and remove the costly 2D.0110 flush in nv50_flush. Correct TIC and TSC bo sizes. --- src/gallium/drivers/nv50/nv50_context.c | 7 --- src/gallium/drivers/nv50/nv50_context.h | 5 ++ src/gallium/drivers/nv50/nv50_screen.c | 25 ++--------- src/gallium/drivers/nv50/nv50_state_validate.c | 53 +++++++++++++++++++++---

Mesa sometimes hands us large user buffers where only a few vertices are read from in the drawing calls before they change again. In such cases, allocating a new buffer from the kernel and copying all the data takes much too long, so this patch uses NV50TCL_VERTEX_DATA to push vertices on the FIFO, which speeds up e.g. nexuiz quite a lot. Additionally it gets rid of the issue that the card

I went through the gallium-nine tree and picked out nouveau patches that are general bug-fixes. The first bunch I'd like to also get into 10.2. I've reviewed all of them and they make sense to me, but sending them out for public review as well in case there are any objections. Unless I hear objections, I'd like to push this by Friday. Christoph Bumiller (11): nv50,nvc0: always pull

Hi. There's not much to say here, just replacing the screen_init stateobj with direct pushbuffer emission. We don't need to store all the usless state from init, and the constant buffer relocations which currently don't work if the addresses change (because the method CB_DEF_SET isn't among them (not an address)) become effective. Thoughts, ack / nack ? Thanks, Christoph

Just wanted to communicate some thoughts I had while reading the diffs, even thought I didn't have the time to look at everything in detail yet. - nv50: use relocs rather than re-uploading TIC all the time It's nice that we can write relocs to arbitrary buffers, and it's much less work than emitting the whole state object obviously. Just, you forgot the card won't care until you

I upgraded mesa, libdrm, xf86-video-nouveau and the DRM module to latest git recently (previously I had git versions from Dec 22). Now, when I try to run a simple GL program with the DRI driver, it fails: glxgears: /usr/include/nouveau/nouveau_pushbuf.h:135: BIND_RING: Assertion `0' failed. The old, previously working build of mesa and the DRI driver also failed, which makes me think the

http://bugs.freedesktop.org/show_bug.cgi?id=21804 Summary: Account Request (gallium/nouveau and xf86-video-nouveau) Product: Mesa Version: unspecified Platform: All OS/Version: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau AssignedTo: nouveau at

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- These look like pretty obvious typos. The x |= read; x &= ~write; (or vice-versa) pattern occurs in nvc0, so I'm guessing that this is what was intended here as well. Not sure if this fixes anything in particular though. src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 4 ++--

On Thu, Oct 27, 2016 at 1:19 PM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Are you sure this refactoring doesn't break anything? > > Few comments inline. > > > On 10/27/2016 04:02 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format.

When trying out the Gallium3D NV50 driver (curiosity) with a small OpenGL program that renders 2 rotating triangles partially occluding each other I noticed that depth buffer clearing by rendering a quad (st_cb_clear.c/clear_with_quad) didn't work properly. I found this was because the rasterizer state that is set by clear_with_quad has bypass_vs_clip_and_viewport = 1 which would only be

On 21/05/14 00:39, Ilia Mirkin wrote: > From: Christoph Bumiller <e0425955 at student.tuwien.ac.at> > > [imirkin: add logic to also clear the "regular" scissors] Can you please share why are you've added the "regular" scissors ? Does it matter if we set the screen scissors before the render target params? Thanks Emil > Reviewed-by: Ilia Mirkin

http://bugs.freedesktop.org/show_bug.cgi?id=23291 Summary: A slight problem in the NV50 nouveau driver in Mesa Product: Mesa Version: unspecified Platform: Other OS/Version: All Status: NEW Severity: minor Priority: medium Component: Drivers/DRI/nouveau AssignedTo: nouveau at lists.freedesktop.org

https://bugs.freedesktop.org/show_bug.cgi?id=49086 Bug #: 49086 Summary: nouveau ? Gallium 0.4 on NVA5 ? 2.1 Mesa 8.0.2 crashes Firefox Nightly Classification: Unclassified Product: Mesa Version: 8.0 Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal

OK, so there's a bunch of stuff in here. The geometry stuff is based on the work started by Bryan Cain and Christoph Bumiller. Patches 01-12: Add support for geometry shaders and fix related issues Patches 13-14: Make it possible for fb clears to operate on texture attachments with an explicit layer set (as is allowed in gl 3.2). Patches 15-17: Make ARB_texture_multisample work

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- All the arb_texture_cube_map_array piglits pass except the sampler-cube-shadow one. However, nva0+ appear to all fail at the non-array version of that test, sampler-cube-shadow, so I think it's very likely to be related. Probably some sampler setup bits changed. src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 5

This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 22 ++++--------------- src/nvc0_xv.c | 67

Different textures may be bound to each slot for each stage. So we need to be able to upload ms parameters for each one without stages overwriting each other. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.1 10.2" <mesa-stable at lists.freedesktop.org> --- src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 4 ++++

This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nvc0_accel.c | 11 ++++++++++ src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++ src/nvc0_exa.c | 23 ++++--------------- src/nvc0_xv.c | 67

On Mon, Oct 17, 2016 at 5:46 AM, Samuel Pitoiset <samuel.pitoiset at gmail.com> wrote: > Few comments below. > > On 10/16/2016 09:14 PM, Ilia Mirkin wrote: >> >> This flips GM10x to using the updated format, which is what I tested >> with. However GM20x and GP10x also use this TIC format. >> >> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

Hi, As the last tindc said something about 3d really working on nv4x, I wanted to try that ( on a NV43). Built nouveau/mesa -> gallium-0.1 branch of mesa and git head of libdrm, kernel-drm and xf86-video-nouveau. glxinfo says: nouveau DRI driver expected DDX version 1-1.2.x but got version 0.0.10 So I assume I need some other branch of xf86-video-nouveau (?) I asked in irc but was pointed