similar to: HW configuration

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i'm attempting to rebuild centos51 kernel-xen. (fwiw, because pciback has NOT been compiled into the kernel, http://bugs.centos.org/view.php?id=2767) after, yum install kernel-devel kernel-xen-devel and usual, ln -s /usr/src/kernels/`uname -r`-`uname -m` /usr/src/linux cd /usr/src/linux cp /boot/config-`uname -r` ./.config make oldconfig make menuconfig ... next, make rpm

https://bugzilla.netfilter.org/show_bug.cgi?id=1776 Bug ID: 1776 Summary: No hw offload for flowtables with intel x710 Product: nftables Version: unspecified Hardware: All OS: other Status: NEW Severity: normal Priority: P5 Component: kernel Assignee: pablo at netfilter.org

I don't know if this was asked before... I noticed that HW T&L is not always working. In some apps (Operation Flashpoint for example) if I use HW T&L as D3D driver, I get significant frame rate increase, while in others (Max Payne 1 or Max Payne 2) there is no difference at all. I was testing Max Payne 2 for speed (this game has ?developer mode? in which you can see current FPS), I

Hi, I'm trying to connect * to Nortel BCM 50, This PBX use H.323 v3 to interface with other PBX. The port use to connect is TCP 1720 but I can't configure this port on my * box. I'm using a H.323.conf file sample to activate the port but the * isn't listening there. Somebody have any idea or tip? This is mi H.323.conf [general] port = 1720 bindaddr =

On 03/20/2017 05:43 PM, Michael S. Tsirkin wrote: > On Mon, Mar 20, 2017 at 05:21:22PM +0200, Marcel Apfelbaum wrote: >> On 03/17/2017 11:57 PM, James Hogan wrote: >>> Hi, >>> >>> I've bisected the following failure of the virtio_net linux v4.10 driver >>> to probe in QEMU v2.9.0-rc1 emulating a MIPS Malta machine: >>> >>>

On Mon, 11 May 2020 15:01:27 -0400 Jon Derrick <jonathan.derrick at intel.com> wrote: > The VMD endpoint provides a real PCIe domain to the guest, including Please define VMD. I'm sure this is obvious to many, but I've had to do some research. The best TL;DR summary I've found is Keith's original commit 185a383ada2e adding the controller to Linux. If there's

This fixes a few things that I missed in previous patches: * Use the hw INTX rather than INTA in pt_reset_interrupt_and_io_mapping() This is consistent with other uses of pci_intx() * Remove now inaccurate "/* fix virtual interrupt pin to INTA# */" comments * Use PCI_SLOT() Signed-off-by: Simon Horman <horms@verge.net.au> Index: ioemu-remote/hw/pass-through.c

When tag_set->nr_maps is 1, the block layer limits the number of hw queues by nr_cpu_ids. No matter how many hw queues are used by virtio-blk, as it has (tag_set->nr_maps == 1), it can use at most nr_cpu_ids hw queues. In addition, specifically for pci scenario, when the 'num-queues' specified by qemu is more than maxcpus, virtio-blk would not be able to allocate more than maxcpus

When tag_set->nr_maps is 1, the block layer limits the number of hw queues by nr_cpu_ids. No matter how many hw queues are used by virtio-scsi, as it has (tag_set->nr_maps == 1), it can use at most nr_cpu_ids hw queues. In addition, specifically for pci scenario, when the 'num_queues' specified by qemu is more than maxcpus, virtio-scsi would not be able to allocate more than maxcpus

From: Dongli Zhang <dongli.zhang at oracle.com> [ Upstream commit bf348f9b78d413e75bb079462751a1d86b6de36c ] When tag_set->nr_maps is 1, the block layer limits the number of hw queues by nr_cpu_ids. No matter how many hw queues are used by virtio-blk, as it has (tag_set->nr_maps == 1), it can use at most nr_cpu_ids hw queues. In addition, specifically for pci scenario, when the

From: Dongli Zhang <dongli.zhang at oracle.com> [ Upstream commit bf348f9b78d413e75bb079462751a1d86b6de36c ] When tag_set->nr_maps is 1, the block layer limits the number of hw queues by nr_cpu_ids. No matter how many hw queues are used by virtio-blk, as it has (tag_set->nr_maps == 1), it can use at most nr_cpu_ids hw queues. In addition, specifically for pci scenario, when the

From: Dongli Zhang <dongli.zhang at oracle.com> [ Upstream commit bf348f9b78d413e75bb079462751a1d86b6de36c ] When tag_set->nr_maps is 1, the block layer limits the number of hw queues by nr_cpu_ids. No matter how many hw queues are used by virtio-blk, as it has (tag_set->nr_maps == 1), it can use at most nr_cpu_ids hw queues. In addition, specifically for pci scenario, when the

From: Dongli Zhang <dongli.zhang at oracle.com> [ Upstream commit bf348f9b78d413e75bb079462751a1d86b6de36c ] When tag_set->nr_maps is 1, the block layer limits the number of hw queues by nr_cpu_ids. No matter how many hw queues are used by virtio-blk, as it has (tag_set->nr_maps == 1), it can use at most nr_cpu_ids hw queues. In addition, specifically for pci scenario, when the

Hi, I'm trying to find a place where objects held in nv40_context->state.hw[] and nv40_screen->state[] are being unreferenced during pipe_context destruction. Currently I'm observing that these objects are not unreferenced and since they hold reference to buffer objects, the buffer objects themselves are not unreferenced as well (for example color buffer or z buffer). In

Commit-ID: 1de72c706488b7be664a601cf3843bd01e327e58 Gitweb: https://git.kernel.org/tip/1de72c706488b7be664a601cf3843bd01e327e58 Author: Michael Kelley <mikelley at microsoft.com> AuthorDate: Sun, 4 Nov 2018 03:48:57 +0000 Committer: Thomas Gleixner <tglx at linutronix.de> CommitDate: Sun, 4 Nov 2018 11:04:46 +0100 x86/hyper-v: Enable PIT shutdown quirk Hyper-V emulation of

On Wed, 13 May 2020 00:35:47 +0000 "Derrick, Jonathan" <jonathan.derrick at intel.com> wrote: > Hi Alex, > > I'm probably not getting the translation technical details correct. > > On Mon, 2020-05-11 at 16:59 -0600, Alex Williamson wrote: > > On Mon, 11 May 2020 15:01:27 -0400 > > Jon Derrick <jonathan.derrick at intel.com> wrote: > >

Hello, I have been looking at cubic texture mapping for a bit, and I have found that hw mipmap generation doesn't work at all or the textures are all messed up (normal 2d work fine). This is with linear textures. Also of note is that software mipmap generation works fine. I have done sanity checks for the miptree pitches, offsets, etc and everything seems to match up fine for both the