similar to: Open Source PCI Bridge Soft Core

There is a 'feeling' on the opencores list that an audio decoder is desired. (MP3 gets mentioned occasionally, but has its patent problems etc...) http://www.opencores.org/ no audio projects are underway yet and I think a vorbis decoder will take a while but even if only a start is made then others may add to it. For their one year anniversary they will actually be doing a chip run and

TTA-based Co-design Environment (TCE) v1.6 released --------------------------------------------------- TTA-based Co-design Environment (TCE) is a toolset for designing application-specific processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL and

TTA-based Co-design Environment (TCE) is a toolset for design and programming of low power customized processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL and Verilog generation supported) and parallel program binaries. Processor customization points

TTA-based Co-design Environment (TCE) is a toolset for design and programming of low power customized processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL and Verilog generation supported) and parallel program binaries. Processor customization points

Hi list, On my system I have gv 3.5.8 and it does not like to be called with --spartan before the <filename>. The man-page is stating that the file name has to come before all arguments and the --spartan is actually -spartan. I don't know for newer versions of gv. The attached patch fixes that for me. Please apply if appropriate. thanks, Patrick. -------------- next part

TTA-Based Codesign Environment (TCE) v1.3 released -------------------------------------------------- TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable codesign flow from C programs down to synthesizable VHDL and parallel program binaries. Processor

Hello, I wanted to tell the LLVM developers list about http://www.c-to-verilog.com. I created this website to provide free on-line compilation of C into Verilog. I use LLVM as the C parser and optimizer. I have been working on this project for 2 years now. I would like to thank Chris, Vikram and the rest of the LLVM developers. I am very happy with the LLVM infrastructure, documentation, and

If you're designing a new high-level HDL, then it would be a good idea to familiarise yourself with the state of the art in this area (e.g. Bluespec System Verilog, Symbolics Processor Designer, and similar tools). Starting from comparisons to VHDL and Verilog is like designing a new high-level programming language today that is designed to be a better high-level programming language that is

Hi LLVM developers, I am implementing Loong Language[1] using Clang FrontEnd and LLVM MiddleEnd. I add `wire`[2] Builtin Type, and clang is able to parse very small testcase fulladder[3] but failed to work for 10+K loc RISCV E203 project[4]: Loongson clang version 7.0.0 (git at github.com:Loong-Language/loong-clang.git 8f7e826f27abbe12ea08d9563490298c38d3adc1) (git at

Hi! I think it is a great idea. The DS80C400 needs external memory, and/or flash. It have the Ethernet integrated, but it is really slow (it is 8051 architecture), and yes, I know it can go up ti 75Mhz, but only gives 18MIPS max. I would use ATmega128 from atmel (16MIPS at only 16Mhz), take a look at: http://www.ethernut.de (project using mega128 with Ethernet, includes schematics). It

Hello, Does anybody runs supermount or submount or anything else. If yes can describe how did it establish. Thanks in advance Mario Tadej

Hi, I am in the processof migrating a a NT4 PDC over to a samba3 server. I am following this guide:http://vermeulen.ca/linux-windows-nt.html I am able to join the Domain but when I go to net rpc vampire I get the following errors: Not all my users get transfered: [root at HERCULES ~]# net rpc vampire -S GENOME -w HERCULES -U administrator Fetching (to passdb) DOMAIN database Creating unix

I concur with Jose. The Atmel AVR series packs a lot of bang for the buck. They also come in a 3.3v low power version for use in battery powered systems. Gene -----Original Message----- From: Leo Ann Boon [mailto:leo@innovax.com.sg] Sent: Tuesday, August 19, 2003 7:21 PM To: asterisk-users@lists.digium.com Subject: Re: [Asterisk-Users] Re: Open source IP phone, maybe? Ubicom's Scenix IP2K.

Hi, For the synthesis backend which translate to VHDL or Verilog, I don't know if I will use LLVM. It will depend on how easy it is to play with concurrent statements with LLVM. For the simulation I will use LLVM because I can anyways artificially make the compiled code sequencial. It would allow me to benefit from all the nice things from LLVM like existing optimisations. I have never

Luke Kenneth Casson Leighton wrote: > i was just writing this: > http://www.gp32x.com/board/index.php?/topic/60228-replicating-the-success-of-the-openpandora-discussion-v20/ > > when something that just occurred to me, half way through, and i would > greatly appreciate some help evaluating whether it's feasible. > > put these together: >

Hi, I study electricity in the University of Applied Sciences of Western Switzerland and I just began my diploma work: an embedded Internet Radio Receiver. I want to use the Tremor Codec on a ARM7TDMI uc (Samsung S3C4510B). And I need to convert the decoded Vorbis signal in an I2S bus signal (clk, word-select, and data) with a CPLD (Xilinx SPARTAN II) It will be helpfull if someone can explain

I'm currently looking to start my working on my major project for College. I want to create an audio CD archival/ playback server. There will be a base server and also several satellite players. I will be building a secondary server for my car. And in the car power is at a premium so I wanted true hardware support (unlike phatnoise which is software based). The car will support both

Hello, I previously sent this message, but it was in HTML only, so it was unreadable. I am thinking about making a compiler for a new HDL language, that will be more modern than VHDL and Verilog and allow a little higher level behavioral description than VHDL. For this language, I am beeing influenced by VHDL, Ada, Ruby and MyHDL. I also would like to write it in Ada. I don't know if it

Hi Centos friends. I had some time to write a spartan tutorial on running the latest stable Jitsi Video Bridge and Jitsi Meet and Centos 7.7. I wrote it while testing it so this WORKS and I am currently using it for fun with the kids. I do have the server currently running but blocked by my firewall. I am willing to allow a few of the people such a Kovacs and others to connect to my Jitsi server

On Tue, 17 Jul 2007, Sarah Thompson wrote: > Do I understand correctly that there is nothing that the current gcc > front end generates that wouldn't fit an old-style GenericValue? I'm > wondering if this might be an interim approach that would avoid me > needing to rewrite huge amounts of code, and since we're not likely to > be supporting anything other than C and C++