similar to: Password Synchronization

It has begun: http://www.sapphire-lang.org Regards, Dan

Hi all, Yeah, I''m going OT here... I''m not entirely sure I understand how Ruby builds parse.y on Windows, but it works. However, when I changed all instances of "Ruby" to "Sapphire", and renamed all the source files, I suddenly started getting this error: byacc ./parse.y ''byacc'' is not recognized as an internal or external command,

Dear Alex, all, I was looking for fcvt.d.{w,l}{,u} in RISCVInstrInfoD and I'm not sure to understand the current definitions: 138 def FCVT_D_W : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, "fcvt.d.w"> { 139 let rs2 = 0b00000; 140 } 141 142 def FCVT_D_WU : FPUnaryOp_r<0b1101001, 0b000, FPR64, GPR, "fcvt.d.wu"> { 143 let rs2 =

On 11/6/20 12:39 PM, Sjoerd Meijer wrote: Hello Simon, Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear: ; Some examples: ; RISC-V V & VE(*): ; %mask = (splat i1 1) ; %evl = min(256, %n - %i) ; MVE/SVE : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() ; AVX: ; %mask = icmp (%i + (seq

Hi, Looking at the language reference, vscale is an integer. This might pose a problem for fractional vscale. Furthermore, I believe that vscale is constant throughout the life of the program; so if RISC-V vscale can vary from instruction to instruction that may also be problematic unless you can just commit to one specific value of vscale. Also, I had a question about your table. Based

On 11/6/20 8:49 AM, Roger Ferrer Ibáñez wrote: Hi Sjoerd, Trying to remember how everything fits together here, but could get.active.lane.mask not create the %mask of the VP intrinsics? Or in other words, in the vectoriser, who's producing the %mask and %evl that is consumed by the VP intrinsics? I'm not sure what would be the best way here. I think about the Loop Vectorizer. I imagine

H all, I'm looking at generating PIC code for RISC-V in the context of Linux. Not sure if anyone is working on this already, any inputs are very welcome. I'm now looking at function calls which in the RISCV backend are represented via two pseudoinstructions RISCV::TAIL and RISCV::CALL. Currently those pseudos are lowered in MCCodeEmitter. They are expanded into AUIPC and JALR

Hi, Last year our systems group tried to install R on an IBM p5-570 machine (16 nodes, 256 GB shared RAM), running AIX 5.3. They ran into all sorts of difficulties and finally gave up. I am interested in trying again (and working with an IBM support group if necessary), but before embarking on this odyssey I was wondering if anyone on this list has ever successfully run R on a similar

Yep, exactly that. We see quite a lot of them, most of them get cleaned up, but not always... Cheers. ________________________________ From: Roger Ferrer Ibáñez <rofirrim at gmail.com> Sent: 16 March 2020 08:53 To: Sjoerd Meijer <Sjoerd.Meijer at arm.com> Cc: LLVM-Dev <llvm-dev at lists.llvm.org>; Sam Parker <Sam.Parker at arm.com> Subject: Re: [llvm-dev] Redundant copies

Hey all, If you tried to register with the Sapphire project but were unsuccessful, please try again. I didn''t have the email settings properly set, so I wasn''t getting the approval notifications. In any case, I''ve changed the project settings so that you should be able to login immediately after registration, without having to wait for admin approval. Regards,

Hi Quentin, > It sounds like you only need the earlyclobber description for the N, N > variant. > In other words, as long as you use different opcodes for widen-op NN and > widen-op WN, you model exactly what you want. > > What am I missing? > we are using different opcodes for widen-op NN and widen-op WN. My understanding is that not setting earlyclobber to the W, N

Hello Jakob, I'm still getting the error, I can give you any other debug info you need. I haven't pasted the regalloc debug info here because it is quite huge, but if you tell me what specific details you need I will include them. Thanks for your help! 2012/7/14 Jakob Stoklund Olesen <stoklund at 2pi.dk> > > On Jul 14, 2012, at 10:09 AM, Borja Ferrer <borja.ferav at

Hello Jakob, Did you get a chance to take a look into this, and if not, can you do it when you get some spare time? Thanks! 2012/12/19 Borja Ferrer <borja.ferav at gmail.com> > We did something like this back when the register allocator couldn't split >> live ranges. >> > > Yes, I remember the isWinToJoinCrossClass() function, removed here: > >

Ok, I've managed to print to my HPDeskjet 694c attached to a Solaris 8 box running samba 2.2.2 from Win98. Problem is with the left margin, there are these little lines (garbage) running down the 1st column on the left side of the page. Also, when I print a page from Word 97, the whole page doesn't print (about 95% of it) and starts a little too far down the page. Printing was perfect

Hi all, we have encountered a case of redundant copies still left in the final code and we would like to, at least, mitigate it. The original motivating case comes from a context where we have large vector registers. In that context, copies are expensive and we would like to avoid them as much as possible. This small testcase in C, similar to the original vector case, exposes the issue but using

Hi all, Has anyone else been able to build Ruby 1.8.7 from source on Windows? I get this when I run configure: C:\>win32\configure.bat find: =: No such file or directory Creating Makefile Creating Makefile(6) : fatal error C1085: Cannot write compiler generated file: '''': Invalid argument NMAKE : fatal error U1077: ''cl'' : return code ''0x1''

did U use : smbpasswd -a user th passwd must be the same rick. >From: "Gary Ferrer" <gary@ferrer.yi.org> >To: "Samba-users" <samba@lists.samba.org> >Subject: [Samba] (no subject) >Date: Fri, 22 Feb 2002 00:07:04 -0800 > >Hi people, sorry for the previous HTML stuff, I hope this time it's plain >text. Here's my problem:

Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, > > I'm still getting the error, I can give you any other debug info you need. > I haven't pasted the regalloc debug info here because it is quite

Hi all, I'm working on a target whose registers have equal-sized subregisters and all of those subregisters can be named (or the other way round: registers can be grouped into super registers). So for instance we've got 16 registers W (as in wide) W0..W15 and 32 registers N (as in narrow) N0..N31. This way, W0 is made by grouping N0 and N1, W1 is N2 and N3, W2 is N4 and N5, ..., W15 is

Dear all, a couple of new generic DAG nodes ISD::ADCARRY and ISD::SUBCARRY were recently introduced in https://reviews.llvm.org/D29872 These nodes have three inputs and two outputs, the second output being the "carry". I understand that carry is well defined for ADDCARRY but my question is about SUBCARRY. Some architectures set the "carry" of a "x - y" subtraction