similar to: How many TE405 ...

Displaying 20 results from an estimated 800 matches similar to: "How many TE405 ..."

2007 Aug 21
3
TE405/TE410P help updating from 1.0 to 1.4
I have a TE405/TE410P card that was working on 1.0.X I upgraded the OS to Centos 4.5, Updated asterisk to 1.4 and zaptel to 1.4.5 and libpri. I copied all the zaptel and zapata and extensions.conf files from 1.0 I did update extensions.conf from 1.0 to 1.4 commands. I cannot get the card to work in 1.4.10. AHHH! I see with zttool that the T1 is in Green, I see calls coming in as the bits go
2006 Nov 22
0
SOLVED: Digium TE405 card and Matra PBX
Hello asterisk-users, I have solved interconnection between Digium TE405 and Matra PBX. I plug this card to another computer and with the same configuration parameters card now works without problem. First server has 2xPIII/1GHz and 256MB of RAM, Adaptec SCSI adapter and SCSI system disk. I don't know now, what chipset it was, but mainboard was from Supermicro, then I pretend Intel chipset.
2006 Oct 11
0
Digium TE405 card and Matra PBX
Hello asterisk-users, I have problem with E1 line between Asterisk computer and our PBX Matra: asta*CLI> pri show span 1 Primary D-channel: 16 Status: Provisioned, Down, Active Switchtype: EuroISDN Type: CPE Window Length: 0/7 Sentrej: 0 SolicitFbit: 0 Retrans: 0 Busy: 0 Overlap Dial: 0 T200 Timer: 1000 T203 Timer: 10000 T305 Timer: 30000 T308 Timer: 4000 T313 Timer: 4000 N200 Counter: 3 My
2006 Feb 17
6
MOH from RCA jack?
Been around asterisk for two-plus years, but need a little input from the list on this topic. Have a potential client that wants to replace their old key system with *, but they want to integrate a commercial message service (they pay a monthly fee to have special MOH messages generated) into their system. The messages are essentially delivered to this customer via older generation audio
2008 Apr 05
1
Zaptel data mode not supported?
Hello: Have a TE110P laying around and decided to see if I could build a router around it. I've tried compiling several versions of zaptel .1.4.x with the same results. I checked the zaptel changelog and can't find anything about it no longer being supported (or that it ever was for that matter). ztcfg: Zaptel Configuration SPAN 1: CCS/HDB3 Build-out: 0 db (CSU)/0-133 feet (DSX-1)
2006 May 10
1
mg3000-r fxo gateway provides more feature to work with asterisk
Hi, every one I'd like to introduce some new feature of our products. mg3000-r fxo gateway provides more feature to work with asterisk. 1.play asterisk ivr with no interuption. when the mg3000-r received call from co line, it wouldn't conect instantly.instead, it start call to asterisk ivr first,when the ivr ready, it connect the co line. this feature make user feel friendly.
2006 Oct 12
1
Bridging of PRI calls
Hello ! I 've some questions how bridging of ISDN calls is done. Assume an asterisk system with a TE405 card equipped. (PRI1 - PRI4) An incoming ISDN call on PRI1 is transfered back to PRI3. Unless there is DTMF detection or other things involved, the bridging is done without Asterisk. Does this card have a some sort of cross connection ? Does the PCM leave the card ? Or is there some DMA
2012 Dec 11
2
questions on French characters in plot
Dear all, I have imported a dataset from Stata using the foreign package. The original data contain French characters such as è and ç . After importing, string variables containing names of French departments have changed. E.g. Ardèche became Ard\x8fche. I would like to ask how I could plot these changed strings, since now the strings with special characters fail to be printed in the plot (either
2017 Dec 08
3
[PATCH] drm/nouveau/imem/nv50: fix incorrect use of refcount API
Commit be55287aa5b ("drm/nouveau/imem/nv50: embed nvkm_instobj directly into nv04_instobj") introduced some new calls to the refcount api to the nv50 mapping code. In one particular instance, it does the following: if (!refcount_inc_not_zero(&iobj->maps)) { ... refcount_inc(&iobj->maps); } i.e., it calls refcount_inc() to increment the
2016 Jun 23
1
[RFC PATCH] drm/nouveau/fb/nv50: set DMA mask before mapping scratch page
Ard Biesheuvel <ard.biesheuvel at linaro.org> writes: > The 100c08 scratch page is mapped using dma_map_page() before the TTM > layer has had a chance to set the DMA mask. This means we are still > running with the default of 32 when this code executes, and this causes > problems for platforms with no memory below 4 GB (such as AMD Seattle) > > So move the dma_map_page()
2016 Jun 20
2
[RFC PATCH] drm/nouveau/fb/nv50: set DMA mask before mapping scratch page
The 100c08 scratch page is mapped using dma_map_page() before the TTM layer has had a chance to set the DMA mask. This means we are still running with the default of 32 when this code executes, and this causes problems for platforms with no memory below 4 GB (such as AMD Seattle) So move the dma_map_page() to the .init hook, and set the streaming DMA mask based on the MMU subdev parameters before
2016 Oct 06
6
[PATCH v5 0/3] drm/nouveau: set DMA mask before mapping scratch page
This v4 is now a 3 piece series (since v4), after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In
2017 Dec 18
1
[PATCH] drm/nouveau/imem/nv50: fix incorrect use of refcount API
Hey Ard, It seems that Ben already committed a similar patch to his tree (see [0]). I do not know whether he is planning to have it part of a pull request of fixes for 4.15. Best regards, Pierre [0]: https://github.com/skeggsb/nouveau/commit/9068f1df2394f0e4ab2b2a28cac06b462fe0a0aa On 2017-12-18 — 09:27, Ard Biesheuvel wrote: > On 8 December 2017 at 19:30, Ard Biesheuvel <ard.biesheuvel
2016 Sep 26
6
[PATCH v4 0/3] drm/nouveau: set DMA mask before mapping scratch page
This v4 is now a 3 piece series, after Alexandre pointed out that both GF 100 and NV50 are affected by the same issue, and that a related issue has been solved already for Tegra in commit 9d0394c6bed5 ("drm/nouveau/instmem/gk20a: set DMA mask early"). The issue that this series addresses is the fact that the Nouveau driver invokes the DMA API before setting the DMA mask. In both cases
2017 Mar 28
5
[Bug 100431] New: nv50: memory corruption due to use-after-free of dma_fence
https://bugs.freedesktop.org/show_bug.cgi?id=100431 Bug ID: 100431 Summary: nv50: memory corruption due to use-after-free of dma_fence Product: xorg Version: unspecified Hardware: ARM OS: Linux (All) Status: NEW Severity: major Priority: medium Component:
2016 Jul 07
3
[PATCH v3] drm/nouveau/fb/nv50: set DMA mask before mapping scratch page
The 100c08 scratch page is mapped using dma_map_page() before the TTM layer has had a chance to set the DMA mask. This means we are still running with the default of 32 when this code executes, and this causes problems for platforms with no memory below 4 GB (such as AMD Seattle) So move the dma_map_page() to the .init hook, and set the streaming DMA mask based on the MMU subdev parameters before
2016 Jul 15
1
[PATCH v3] drm/nouveau/fb/nv50: set DMA mask before mapping scratch page
On 15 July 2016 at 07:52, Alexandre Courbot <gnurou at gmail.com> wrote: > On Fri, Jul 8, 2016 at 1:59 AM, Ard Biesheuvel > <ard.biesheuvel at linaro.org> wrote: >> The 100c08 scratch page is mapped using dma_map_page() before the TTM >> layer has had a chance to set the DMA mask. This means we are still >> running with the default of 32 when this code executes,
2006 Mar 21
6
FAX over PRI
We are doing this with the latest spandsp, iaxmodem and hylafax. Seems to work very well for us so far. -Jonathan > -----Original Message----- > From: asterisk-users-bounces@lists.digium.com [mailto:asterisk-users- > bounces@lists.digium.com] On Behalf Of Michael Gaudette > Sent: Tuesday, March 21, 2006 3:34 PM > To: 'Asterisk Users Mailing List - Non-Commercial
2016 Oct 16
1
[PATCH v5 0/3] drm/nouveau: set DMA mask before mapping scratch page
On 7 October 2016 at 09:12, Alexandre Courbot <gnurou at gmail.com> wrote: > On Fri, Oct 7, 2016 at 12:49 AM, Ard Biesheuvel > <ard.biesheuvel at linaro.org> wrote: >> This v4 is now a 3 piece series (since v4), after Alexandre pointed out that >> both GF 100 and NV50 are affected by the same issue, and that a related issue >> has been solved already for Tegra
2016 Oct 03
1
[PATCH v4 1/3] drm/nouveau: set streaming DMA mask early
On Mon, Sep 26, 2016 at 9:32 PM, Ard Biesheuvel <ard.biesheuvel at linaro.org> wrote: > Some subdevices (i.e., fb/nv50.c and fb/gf100.c) map a scratch page using > dma_map_page() way before the TTM layer has had a chance to set the DMA > mask. This may prevent the driver from loading at all on platforms whose > system memory is not covered by the default DMA mask of 32-bit (i.e.,