Displaying 20 results from an estimated 900 matches similar to: "International Talking Clocks"
2004 Oct 02
2
Billing Applications - When does the bill start??
Hi,
I have been having a look at the code for
asteriskprepaid and it appears as if the billing time
starts when the Dial command is called.
Is this correct? Does the caller get billed for the
dialling time and the call time or just the call time?
Although going off some comercial calling cards I have
used I think they start billing when you begin
thinking about the call.
Thanks,
Aaron
2004 Jul 17
4
E100P and Colt Telecom (Europe)
Hi,
Has anyone connected * to a Colt E1 line in Europe? If
so could you send me the zaptel.conf and zapata.conf.
Thanks,
Aaron
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2004 May 15
2
Subject: Re: X100P Ireland Red Alarm
Hi,
I suspected that I the analogue phone should have got
a pass through signal when the power was off to the
server, unfortunately it doesn't. I kept asking digium
support about that but they didn't give me an answer.
The problem is how do I identify whether the X100P is
incompatibel with the network or faulty without
possibly wasting another USD100???
Aaron
On Sat, 2004-05-15, Eric
2004 May 16
4
X100P Ireland Red Alarm (AR Tarzi)
Ahhh this could be my problem! I just checked which
wires on the RJ11 cable had a voltage across them and
it was the yellow and green (3 & 4?). From what
someone posted the other day it's supposed to be
Bumble Bee and Christmas Tree.
I did have to get a technician out to fix my line when
it was first installed because it was dead. Maybe he
wired it up incorrectly or maybe they just do it
2004 Jun 23
4
Future WinCE IP Phone
Hi,
Found a nice little video about a prototype phone from
broadcom currently sitting in Microsoft WinCE lab. The
video is at:
http://channel9.msdn.com
The video in question is an interview with Mike Hall
titled "Windows CE and Windows Embedded Lab Tour". The
clip dealing with the VOIP phone is right at the start
so you don't need to watch the whole thing (although
there is some
2006 Apr 08
9
DESIGN question: We do not need damned publishers
Here is the actual design of my CMS :
each Item is secured by 3 (+1) elements:
readers group
writers group
publishers group
owner
readers = people who can find the item in the database and .... read it.
writers = people who can add new content (create new versions or
sub-pages) without making their changes visible (they can propose
content).
publishers = people who can change what readers
2010 Feb 04
1
[LLVMdev] Instruction Itineraries
All,
I am working on a scheduler for X86 and would like to
include instruction latencies. It appears that this
information is gathered from instruction itineraries, but
that there isn't an itinerary for X86. I also can't seem
to find documentation on how to add this for X86. Any
pointers would be helpfull.
Aran
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2010 Feb 13
1
[LLVMdev] llvm-gcc 4.2
All,
I'm trying to build llvm-gcc 4.2 from svn (as of about a
week ago). I'm getting:
../../llvm-gcc-4.2/libcpp/expr.c: In function 'num_negate':
../../llvm-gcc-4.2/libcpp/expr.c:1114: internal compiler
error: Segmentation fault
Please submit a full bug report,
with preprocessed source if appropriate.
I would like to do some debugging, but I don't see
where
2010 Mar 26
2
[LLVMdev] X86 Target instruction definitions
All,
Where are the SSE instructions defined? Specifically, I
cannot find the def for ADDSDrr.
Aran
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2010 May 07
1
[LLVMdev] Missuse of xmm register on X86-64
All,
I've been working on a new scheduler and have
somehow affected register selection. My problem is that an
xmm register is being used as an index expression.
Specifically,
addss (%xmm1,%rax,4), %xmm0
I like the idea of a floating-point index, but, like the
assembler, I don't know what that means. Any suggestions
on where I should look for a solution to my problem?
2010 May 19
1
[LLVMdev] Scheduled Instructions go missing
All,
I'm working on a new scheduler. I have a basic block for
which my scheduler generates bad code. The C code looks
like
int j, *p;
if ((j = *p++) != 0) {...}
My scheduler emits (x86, AT&T)
mov p, %rax
mov (%rax), %rax
mov %rax, j
addq $0x04, p
je ...
Notice there is no test instruction. The default list
scheduler generates
mov p, %rax
mov (%rax), %rax
mov %rax, j
addq $0x04,
2004 May 15
1
X100P Ireland Red Alarm
Hi,
Has anyone got the X100P to work with an anlogue line
in the Republic of Ireland?
I have the X100P installed but zttool indicates a Red
Alarm status on the card. It is on its own interrupt
and I have tried different PCI slots but all to no
avail.
Are there any alternatives to the X100P that can work
with asterisk and are likely to work in Ireland?
Thanks,
Aaron
2009 Aug 11
2
libThusnelda 20081201
I'm having a issue with build libThusnelda 20081201,video is blocky, you
can clearly see video is blocky in some parts of the video.
the Bit rate is high so what is the problem is, on x264 this type of Bit
rate will make the video very smooth. can anybody tell me how to get
that smooth video and what settings can i use,
I'm interested in the advanced usage of Thusnelda with two pass
2015 Dec 01
0
[RFC PATCH 4/5] subdev/clk: print the base clocks
this is just a nice thing to know and there is no harm in printing them
---
drm/nouveau/nvkm/subdev/clk/base.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c
index d731bc3..df9173e 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -24,6 +24,7 @@
#include
2015 Dec 02
0
[RFC PATCH 4/5] subdev/clk: print the base clocks
> Pierre Moreau <pierre.morrow at free.fr> hat am 2. Dezember 2015 um 02:34
> geschrieben:
>
> Hi,
>
> On 05:42 PM - Dec 01 2015, Karol Herbst wrote:
> > this is just a nice thing to know and there is no harm in printing them
> > ---
> > drm/nouveau/nvkm/subdev/clk/base.c | 16 ++++++++++++++++
> > 1 file changed, 16 insertions(+)
> >
>
2016 Mar 17
0
[PATCH 04/19] clk: print the base clocks
Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
drm/nouveau/nvkm/subdev/clk/base.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drm/nouveau/nvkm/subdev/clk/base.c b/drm/nouveau/nvkm/subdev/clk/base.c
index 889cce2..4928668 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -24,6 +24,7 @@
#include
2017 Mar 05
0
[PATCH 8/9] clk: Set clocks to pre suspend state after suspend
The idea is to clear out the saved state, because after a resume we can't
know what the GPU is clocked to. The reclock is triggered by the call to
nvkm_clk_update later in nvkm_clk_init.
Signed-off-by: Karol Herbst <karolherbst at gmail.com>
Reviewed-by: Martin Peres <martin.peres at free.fr>
---
drm/nouveau/nvkm/subdev/clk/base.c | 9 ++++++---
1 file changed, 6 insertions(+), 3
2017 Sep 15
0
[RFC PATCH 09/29] clk: Set clocks to pre suspend state after suspend
The idea is to clear out the saved state, because after a resume we can't
know what the GPU is clocked to. The reclock is triggered by the call to
nvkm_clk_update later in nvkm_clk_init.
v2: convert to C style comments
Signed-off-by: Karol Herbst <karolherbst at gmail.com>
Reviewed-by: Martin Peres <martin.peres at free.fr>
---
drm/nouveau/nvkm/subdev/clk/base.c | 10 +++++++---
2006 Sep 22
1
can't access Samba share when clocks skew is too great
Hi all,
I have a Samba 3.0.23c server joined to an Windows 2003 AD domain. Users
access it from Windows workstations (XP, 2000). The problem is that if a
workstation has its time off by more than 5 minutes, Samba server cannot be
accessed. I understand that Kerberos cannot authenticate the clients due to
clock skew; however, I thought that in such case Samba could falls back to
NTLM auth. At
2013 May 31
1
Clocks drift again
Hi All,
Sorry again to bother you with this but there is really something I
don't fully understand about client/server clock syncs.
If I connect to the stream with a fresh browser, I can measure between
5-10 secs latency.
I keep listening to it for while, and the delay between server and
client grows as listening is going on.
As pointed out Philipp yesterday to me, it's approximately a 5%