similar to: fedora core 4 + mysql 5 + dovecot

Displaying 20 results from an estimated 2000 matches similar to: "fedora core 4 + mysql 5 + dovecot"

2006 Oct 12
4
How do you like TrixBox?
So I'm sure many of you are using or have tried to use TrixBox. Thus far, I'm in love with it. I haven't had a single snag. Then again, I don't need to get into anything overly nitty gritty with my Asterisk box. What are your views? -- Want a free copy of "TrixBox Made Easy"? Read the contest rules
2008 Apr 15
6
[LLVMdev] PATCH: Use size reduction -- wave2
Hi All, here comes the patch for the second wave of Use class size reduction. I have included all the machinery that is needed, and it is *active*. The User* inside of Use is even sometimes NULL, but the algorithm is able to recover it. If there is a non-null User* present, then I am asserting that it equals the computed value. I did not receive feedback for the algorithmic part yet, so I
2006 Jul 13
3
Performance diff between rendering partial vs. calling a helper?
Hi, Is there any performance difference between rendering partials vs. calling a helper? When we initally started coding we built a bunch of small partials and if there is a significant performance overhead with them, we''ll probably try to switch them over to helpers. They seem like they would be quite similar but I don''t know the full details of how partials are handled.
2008 Sep 24
2
[LLVMdev] Multi-Instruction Patterns
On Wednesday 24 September 2008 02:10, Evan Cheng wrote: > > I wrote a pattern that looks something like the above in form, but how > > do I tell the selection DAG to prefer my pattern over another that > > already exists. I can't easily just disable that other pattern > > because > > it generates Machine Instruction opcode enums that are assumed to be > >
2017 May 03
4
DWARF Fission + ThinLTO
So Dehao and I have been dealing with some of the nitty gritty details of debug info with ThinLTO, specifically with Fission(Split DWARF). This applies to LTO as well, so I won't single out ThinLTO here. 1) Multiple CUs in a .dwo file Clang/LLVM produces a CU for each original source file - these CUs are kept through IR linking (thin or full) and produced as distinct CUs in the resulting
2017 May 04
2
DWARF Fission + ThinLTO
On Thu, May 4, 2017 at 7:22 AM, Rafael Avila de Espindola via llvm-dev < llvm-dev at lists.llvm.org> wrote: > David Blaikie via llvm-dev <llvm-dev at lists.llvm.org> writes: > > > So Dehao and I have been dealing with some of the nitty gritty details of > > debug info with ThinLTO, specifically with Fission(Split DWARF). > > > > This applies to LTO as
2019 May 03
2
Source client with HTTP PUT
Hi, I'm writting a source client in c#, in which I'm sending chunks of a mp3 file with http Put to IceCast. My problem is, that it is not a continues stream. Each http PUT request is an extra track. How can I generate an ongoing stream with mp3 chunks, which I send per http Put to IceCast. Any suggestions? My headers are: Headers.Add("Content-Type", "audio/mpeg");
2005 Oct 18
3
PDC for Multiple Domains from a Single Samba Box
I've struggled with this for a couple of weeks, and have looked at countless posts and at the Samba documentation collection with no real solution. I'm setting up a lab that needs to have multiple domains (for machine / user segregation politics) for around 40 windows XP professional machines. I have a single Linux server running Suse 9.2. I would like for this server to be able to
2006 Apr 11
1
Mixins?
As is often the case when I tackle a new platform/language, I get the big picture very quickly (because frameworks are frameworks are frameworks) but its the nitty-gritty of the language that bogs me down... So I have some similar methods on a few of my model classes that I wanted to push into a helper. Now I reckoned that the Ruby way was to create a module and mix it in with include. However, I
2009 Dec 16
2
[LLVMdev] Early-clobber constraint in TableGen
On Dec 15, 2009, at 5:08 PM, David Greene wrote: > On Tuesday 15 December 2009 18:01, Jim Grosbach wrote: > >> For a usage example, I've included in the patch the modification to >> use the constraint for the STREX ARM instruction. > > Your example is: > > constraints = "@early $success" > > Why not spell it as: > > constraints =
2013 Jan 28
18
Referencing a variable from one class in another
I have one module, kibana, that defines a file snippet for the apache module to fulfill (e.g., /etc/https/conf.d/kibana.conf). The apache::params class defines a variable of the path of where this snippet should be placed, $config_d. The snippet uses this variable in its definition. However, it seems that the snippet never resolves the $apache::params::config_d variable, and I''m
2016 May 06
2
Resuming the discussion of establishing an LLVM code of conduct
On 5/5/2016 4:19 PM, Tanya Lattner via llvm-dev wrote: > Having a code of conduct like this is just as bad as having no code of conduct at all. It trivializes the importance of a code of conduct and its pretty much impossible to enforce. Code of conduct should reflect the community standards, not define them. These standards come from the minds of the members of the community. A CoC that
2017 May 05
2
DWARF Fission + ThinLTO
> On May 4, 2017, at 4:53 PM, David Blaikie <dblaikie at gmail.com> wrote: > > Alrighty, a little fuzzy on how best to implement this - Adrian, you've probably got the most context here as to how to wrangle this. > > My first attempt was in IRMover.cpp, IRLinker::linkFunctionBody - after metadata is copied over, create a new subprogram derived from Dst.getSubprogram,
2005 Jan 18
0
[LLVMdev] Re: LLVM to SUIF-MACH VM binary
Chris Lattner wrote: > On Tue, 18 Jan 2005, John Cortes wrote: > >> Hi Chris, > > > Hi! I'm CC'ing the llvmdev list for the benefit of others. > >> Since I see you're very involved in LLVM, I need a little guidance on >> getting from C to MACH-SUIF. >> >> I've been given the task of using LLVM to translate C code to another
2015 Sep 23
2
[RFC] New pass: LoopExitValues
On Mon, Sep 21, 2015 at 11:13 AM, Wei Mi <wmi at google.com> wrote: > Maybe it can follow the "Delete dead loops" pass which is after > Induction Variable Simplification pass, so it will not affect existing > exitvalue rewriting optimization in Induction Variable Simplification > to find out and delete dead loops? > > Existing pass pipeline: >
2013 Mar 04
4
Learning the R way – A Wish
There is something that I wish I had that I think would help me a lot to be a better R programmer, that I think would probably help many others as well. I put the wish out there in the hopes that someone might think it was worth doing at some point. I wish I had the code of some substantial, widely used package ? lm, say ? heavily annotated and explained at roughly the level of R knowledge of
2016 May 06
4
Resuming the discussion of establishing an LLVM code of conduct
+1 for this TL;DR suggestion - you can guarantee most people would read < 7 short bullet points. Cheers, -Neil. On 06/05/16 15:53, Arnaud Allard de Grandmaison via llvm-dev wrote: > For what it's worth, I think this is an improved version of the CoC, > and I'm OK with it. Thanks to Chandler and all those who have been > working on it. > > It's not perfect ---
2005 Jan 18
2
[LLVMdev] Re: LLVM to SUIF-MACH VM binary
On Tue, 18 Jan 2005, John Cortes wrote: >> Can you say a little bit about MACH-SUIF? With a brief google search, I >> didn't turn up anything that described the architecture. Is it a RISC-like >> machine with 32-bit instruction words? >> > > It's another VM representation. I haven't really gotten to know the nitty > gritty of the language so
2003 Apr 06
3
Administrativia: Documentation project slightly on hold (sorry!)
Hello security folks I (not so) recently asked for volunteers to the security documentation project. I got delightfully large number of volunteers! Thank you! Right now I have some personal (medical) issues to deal with, and I'll be out of town for the next 2 weeks. When I get back, we can move ahead at top speed. The project will have 3 parts. FAQ: This will cover any kind of basic
2008 Sep 24
0
[LLVMdev] Multi-Instruction Patterns
On Sep 24, 2008, at 9:15 AM, David Greene wrote: > >> 1. Treat these instructions as cross register class copies. The src >> and dst classes are different (VR128 and FR32) but "compatible". > > This seems reasonable. > >> 2. Model it as extract_subreg which coalescer can eliminate. >> >> #2 is conceptually correct. The problem is 128 bit XMM0 is