search for: zif

...n the right hand >side. So when I say X here, I mean a matrix in which lagged y's >are included as columns. So the individual observation's >likelihood is (I believe this is the Negative Binomial model >with zero inflagion factor) > >input = draw from Gamma(exp(Xb),1)) >zif = draw from logistic(Xb) > >if (zif == 1) then: >p(y |X,b) = Pois( input ) > >if (zif == 0) then: >y=0 > >I suppose it is not necessarily true the zero inflation logit >part depends on the exact same coefficients as the Gamma part, >but lets worry about that later.......

Dear R and lme4 users- I am trying to fit a mixed-effects model, with the glmer function in lme4, to right-skewed, zero-inflated, non-normal data representing understory grass and forb biomass (continuous) as a function of tree density (indicated by leaf-area). Thus, I have tried to specify a Gamma distribution with a log-link function but consistently receive an error as follows: >

Hi, I have configured samba 3.0.2 as Dfs root but it seems smbd dont translate symlink to remote share name. All targeted shares are from testing workstation directly accessible. My config is: --- [global] debuglevel = 10 netbios name = SAMBAII workgroup = XAMBA security = user domain logons = yes preferred master = yes domain master = yes local master = yes

...E-36 (36-bit page size extension) MMX (MMX technology supported) FXSR (Fast floating-point save and restore) SSE (Streaming SIMD extensions) Version: AMD Athlon(tm) XP Voltage: 1.6 V External Clock: 133 MHz Max Speed: 1500 MHz Current Speed: 1800 MHz Status: Populated, Enabled Upgrade: ZIF Socket L1 Cache Handle: 0x0009 L2 Cache Handle: 0x000A L3 Cache Handle: Not Provided Serial Number: Asset Tag: Part Number: Handle 0x0005, DMI type 5, 22 bytes Memory Controller Information Error Detecting Method: 8-bit Parity Error Correcting Capabilities: None Supported Interlea...

Is there a method to view the status of the rams ecc single or double bit errors? I would like to confirm that ecc on my xeon e5520 and ecc ram are performing their role since memtest is ambiguous. I am running memory test on a p6t6 ws, e5520 xeon, 2gb samsung ecc modules and this is what is on the screen: Chipset: Core IMC (ECC : Detect / Correct) However, further down "ECC" is

...ion: Proc 2 Type: Central Processor Family: Other Manufacturer: ID: 00 00 00 00 00 00 00 00 Version: Voltage: 3.3 V 2.9 V External Clock: Unknown Max Speed: 2000 MHz Current Speed: Unknown Status: Unpopulated Upgrade: ZIF Socket L1 Cache Handle: 0x0009 L2 Cache Handle: 0x000A L3 Cache Handle: 0x000B Serial Number: Asset Tag: Part Number: Characteristics: None Handle 0x0009, DMI type 7, 19 bytes Cache Information Socket Designation: L1-Cache Configuration: Disabled, Not Socketed, Level 1 Operational...

...fLJnL?r<>6U_d6t)FmGP`{o>jrKd_1d?XAR+5 zRXoejv+m(pLwQz!XI1m88lDy8S+$)0-3VzsJHoT;c=j-!J)CEc;Mw&&`yV{}pFI0t zJp11~`#(H;B+qUjJbM&iG++#1EMOd9JYWJ~B483=GGGc|DqtF5I$#FC!?R~1m<5;( zm;;y#sO9QBV*Fh-vMA44NO<ld!gCfAPL?2C3Rni(a-{#pu{GzeKrFy>Rw5Y6$zOQx zDrB!l%E!qX1T{Q&ErPo_K|gZWAzIFJ)}xvYNNyxN?_PwP0b7uDA7CrM%L#f+wgLQ{ zl=9r|V7MRf0O9(B2p>YuKu-R{Nk5+RFcKJW?jy+Df$&klV`$-VggXJd0K36c#&h=| z=+DVtIqA!DpFpCP=j;XRK12ue+$X`gAJIE_?g3B_B3i|B4}tm=l20Rf7tcM6<THdf zJ%S|Up8FiKo(CL7`c9s63_*~S3Z8Qu#1lxJ1k(!$PXPw-oYP32LDq{1&mw#Y at G`RQ z;p7zr)ttPFoYz2o9pO2U-az;!!b+a=7NTz>&g...