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HI, Do anyone know where btrfs_print_tree is invoked? thanks. -- Regards, Zhi Yong Wu -- To unsubscribe from this list: send the line "unsubscribe linux-btrfs" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Hi Hal, Thanks for the pointer. Is it possible to get the processor ID on X86 architecture? There is a library call in linux, sched_getcpu(), to the ID. Also, is it possible to get the program counter in the IR? Best, Zhi On Thu, Nov 19, 2015 at 1:33 PM, Hal Finkel <hfinkel at anl.gov> wrote: > Hi Zhi, > > There is no standard (architecture-independent) way to get the processor > id. We do have an intrinsic to get the cycle counter: > > http://llvm.org/docs/LangRef.html#llvm-readcyclecoun...

Say if we have 8 cores, I want to get which core is running the current program. Thanks. On Thu, Nov 19, 2015 at 3:37 PM, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "zhi chen" <zchenhn at gmail.com> > > To: "Hal Finkel" <hfinkel at anl.gov> > > Cc: llvm-dev at lists.llvm.org > > Sent: Thursday, November 19, 2015 3:48:02 PM > > Subject: Re: [llvm-dev] Get timestamp and processor ID in the IR > > > > >...

Hi Shahid, Thank you so much for your response. You suggested approach is what I am right now using. However, it seems that the overhead is a little bit high because we are introducing two more instructions. I was wondering if there was a cheaper way to do it. Best, Zhi On Mon, May 4, 2015 at 2:12 AM, Shahid, Asghar-ahmad < Asghar-ahmad.Shahid at amd.com> wrote: > Hi Zhi, > > > > If I get your question correctly, Yes, you can do it by using the > IRBuilder’s CreateVectorSplat() API. > > > > /// \brief Return a vector value...

...too many memory references for `mov' Error: too many memory references for `mov' Error: junk `ptr [rsp+112]' after expression Error: junk `ptr [rsp+128]' after expression Error: junk `(1)' after expression Error: operand size mismatch for `fsubrp' Any idea? Thanks. -- Zhi On Thu, May 14, 2015 at 10:50 AM, mats petersson <mats at planetcatfish.com> wrote: > Sounds like a bug, as far as I can tell, -mno-sse should disable all use > of SSE instructions (and thus all uses of xmm registers). Exactly what > version of LLVM, and what instructions from wha...

Thanks, Shahid. It is fixed now. On Fri, Apr 17, 2015 at 8:50 PM, Shahid, Asghar-ahmad < Asghar-ahmad.Shahid at amd.com> wrote: > Hi zhi, > > > > You have to also pass the value type to getDecalaration() API such as > > > > Value* sqrtv = Intrinsic::getDeclaration(M, Intrinsic::x86_sse2_sqrt_pd, > v->getType()); > > > > Regards, > > Shahid > > > > *From:* llvmdev-bounces at...

...ruction *dupInst = (Instruction *) dupVal and print it, I'll get: dupInst <2 x double> <double fadd (double undef, double undef), double fadd (double undef, double undef)> It seems that if simply fails to generate the vectorized FADD instruction. Anything wrong with my code? Best, Zhi On Thu, Apr 16, 2015 at 11:55 PM, zhi chen <zchenhn at gmail.com> wrote: > Yes. I was using this. It seems the produced instruction is not correct. > There are probably some other problems. I need to recheck it. Thanks for > your help, Daniel. > > Best, > Zhi > &gt...

...%3 = fadd double %1, double %2 I want to change it into %6 = fadd <2 x double> %4, double %5 where %4 = <double %1, double %1>, %5 = <double %2, double %2>, how can I do this? Thanks, Best On Fri, Apr 17, 2015 at 1:56 AM, Nick Lewycky <nicholas at mxc.ca> wrote: > zhi chen wrote: > >> It seems that the problem was because I used builder.CreateFAdd to >> create a <2 x double> vectortype FADD instruction. It works if I use it >> to create the scalar version FADD. I want to have an instruction like: >> *%2 = fadd <2 x double>...

Hi, I am wondering if it is possible to get the time-stamp and the processor ID where an instruction is exectued in the IR? Thanks for your help in advance:) Best, Zhi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151119/dbbafb32/attachment.html>

Got it. Thanks. I will try it with the trunk version. On Wed, Jan 20, 2016 at 1:36 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Zhi, > On 20 January 2016 at 13:33, zhi chen <zchenhn at gmail.com> wrote: > > Thanks for your response. The attached is the .bc file after my pass. I > > could generate the assembly with -mcpu=skx but not with -mcpu=core-avx2. > > Could you please take a look? BTW, I am usin...

...index1 = ConstantInt::get(u32Ty, 1); Instruction *InsertVal = InsertElementInst::Create(emptyVec, oprnd, index0, "insert"); InsertVal = InsertElementInst::Create(emptyVec, oprnd, index1, "insert"); vecVal = builder.CreateFAdd(emptyVec, emptyVec, ""); Best, Zhi On Fri, Apr 17, 2015 at 12:17 PM, Nick Lewycky <nicholas at mxc.ca> wrote: > zhi chen wrote: > >> I got it. Thanks, Nick. So, it is back to the previous problem. If I >> have the following instruction: >> >> %3 = fadd double %1, double %2 >> >> I wa...

...d make both of the two elements in %1 be the value at %x. I guess one way to do this is to make getelementptr return a <2 x i32>* address, where the two addresses in <2 X 32> are the same. But I don't know if it is possible to do this in LLVM. Any help would be appreciated. Best, Zhi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150504/395c0786/attachment.html>

Does the insert point also mean inserting before the instruction? On Tue, Apr 21, 2015 at 3:36 PM, Daniel Berlin <dberlin at dberlin.org> wrote: > IRBuilder takes an insertion point. > Use it? > > > On Tue, Apr 21, 2015 at 3:17 PM, zhi chen <zchenhn at gmail.com> wrote: > > The current instruction is: > > > > Instruction *pInst; > > > > How can I create a new instruction, say add, after pInst? > > > > Thanks, > > Zhi > > > > > > > > ____________________...

Thanks for your response, Sanjay. I know there are intrinsics available in C/C++. But the problem is that I want to instrument my code at the IR level and generate those instructions. I don't want to touch the source code. Best, Zhi On Fri, Jan 22, 2016 at 4:54 PM, Sanjay Patel <spatel at rotateright.com> wrote: > I was just looking at the related masked load/store operations, and I > think there are at least 2 bugs: > > 1. X86TTIImpl::isLegalMaskedLoad/Store() should be legal for FP types with > AVX1 (n...

...i LLD guest scanning to max_id=0 (a single target ID instance) when connected to individual tcm_vhost endpoints as requested by Paolo. This ensures that virtio-scsi LLD only attempts to scan target IDs up to VIRTIO_SCSI_MAX_TARGET when connected via virtio-scsi-raw. It's currently cut against Zhi's qemu vhost-scsi tree here: https://github.com/wuzhy/qemu/tree/vhost-scsi Cc: Stefan Hajnoczi <stefanha at linux.vnet.ibm.com> Cc: Zhi Yong Wu <wuzhy at linux.vnet.ibm.com> Cc: Paolo Bonzini <pbonzini at redhat.com> Signed-off-by: Nicholas Bellinger <nab at linux-iscs...

...i LLD guest scanning to max_id=0 (a single target ID instance) when connected to individual tcm_vhost endpoints as requested by Paolo. This ensures that virtio-scsi LLD only attempts to scan target IDs up to VIRTIO_SCSI_MAX_TARGET when connected via virtio-scsi-raw. It's currently cut against Zhi's qemu vhost-scsi tree here: https://github.com/wuzhy/qemu/tree/vhost-scsi Cc: Stefan Hajnoczi <stefanha at linux.vnet.ibm.com> Cc: Zhi Yong Wu <wuzhy at linux.vnet.ibm.com> Cc: Paolo Bonzini <pbonzini at redhat.com> Signed-off-by: Nicholas Bellinger <nab at linux-iscs...

...0x415ec40, 0x41bf030, 0x41bf280, 0x41bbb30, 0x41becb8<LD16[%a]> [ORD=8] [ID=0] Do not know how to promote this operator's operand! Any idea about this error? Or could anyone give me an example how to use the gather intrinsic if there is something wrong with the way I am using it? Best, Zhi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160118/d508fbf2/attachment.html>

Value * is the instruction. use dyn_cast<Instruction> to get to it. On Thu, Apr 16, 2015 at 11:39 PM zhi chen <zchenhn at gmail.com> wrote: > But IRBuilder.CreateXYZ only returns a "VALUE" type. Can I get the > instruction created by it? For example, > > IRBuilder<> builder(&*pinst); > Value *val = builder.CreateFAdd(LV, RV, ""); > > How can I...

...c. Any idea about what's wrong here? I found a similarly problem in the following link: http://stackoverflow.com/questions/31663996/clang-llvm-openmp-program-not-spawning-threads/31673394#31673394 But I don't know where should I add -fopenmp=libomp. Any help will be appreciated. Thanks. Zhi -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151202/ea22865c/attachment.html>

...the meaning of the architectural features with that implementation detail. On Fri, Feb 26, 2016 at 12:23 PM, Demikhovsky, Elena < elena.demikhovsky at intel.com> wrote: > No. Gather operation is slow on AVX2 processors. > > > > - * Elena* > > > > *From:* zhi chen [mailto:zchenhn at gmail.com] > *Sent:* Thursday, February 25, 2016 20:48 > *To:* Sanjay Patel <spatel at rotateright.com> > *Cc:* Demikhovsky, Elena <elena.demikhovsky at intel.com>; Nema, Ashutosh < > Ashutosh.Nema at amd.com>; llvm-dev <llvm-dev at lists.llv...