Displaying 2 results from an estimated 2 matches for "zexti32".
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2018 Dec 14
2
Dealing with information loss for widened integer operations at ISel time
..., Eli <efriedma at codeaurora.org> wrote:
>
> On 12/13/2018 6:25 AM, Alex Bradbury wrote:
> > There's also likely to be cases where you want to calculate the demanded bits
> > in order to determine if e.g. a W-suffixed instruction can be selected for
> > `(somoeop (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))`. This is easy to match if
> > the SelectionDAG contains an explicit `sext_inreg` of the result. But if not,
> > you'd need to check whether the upper 32 bits are actually demanded or not.
>
> Could you describe more specifically where this matte...
2018 Dec 13
2
Dealing with information loss for widened integer operations at ISel time
...tricky_shl(i64 %a, i64 %b) {
%1 = shl i64 %a, %b
%2 = shl i64 %1, 32
%3 = ashr i64 %2, 32
ret i64 %3
}
There's also likely to be cases where you want to calculate the demanded bits
in order to determine if e.g. a W-suffixed instruction can be selected for
`(somoeop (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))`. This is easy to match if
the SelectionDAG contains an explicit `sext_inreg` of the result. But if not,
you'd need to check whether the upper 32 bits are actually demanded or not.
Any thoughts on how to best handle these cases? For the shifts I could
obviously i...