Displaying 5 results from an estimated 5 matches for "zerooronebooleancontent".
2010 Jan 20
0
[LLVMdev] [LLVMDev] Is there any way to eliminate zero-extension instruction?
...r3 is not necessary. Is there any way to eliminate it by just modifying
>
> our backend?
>
> Thank you in advance.
>
> Minwook Ahn
Have you told LLVM the result of setcc operations is 0 or 1? Add the following to the constructor of your ISelLowering class:
setBooleanContents(ZeroOrOneBooleanContent);
--
Richard Osborne | XMOS
http://www.xmos.com
2010 Jan 20
2
[LLVMdev] [LLVMDev] Is there any way to eliminate zero-extension instruction?
Dear developers.
We try to make our own backend of llvm for our target machine.
Assume that we have the following code in our source code.
int i = ( a < b );
The code is translated into
r0 <- gt r1 r2
r3 <- and r0 0x1
We think that r3 is not necessary. Is there any way to eliminate it by just
modifying
our backend?
Thank you in advance.
Minwook Ahn
-------------- next part
2020 Feb 19
2
i1 true ^= -1 in DAG matcher?
...ed, Feb 19, 2020 at 3:01 PM Hendrik Greving <
hendrik.greving.smi at gmail.com> wrote:
> Yes the cited FIXME code might be unrelated. I do think there is _some_
> kind of issue somewhere because I do see a BUILD_VECTOR of i1 -1 on our
> target which I set to setBooleanVectorContents(ZeroOrOneBooleanContent).
> The backend is not open source, but the i1 vector is an input to a clang
> builtin which takes V8i like
> __builtin_special(~mask) where mask is an vector of i1 form a setne (cmp),
> and the vector of i1 -1 is from the ~ that does an xor of those two
> vectors. I would have expec...
2015 Dec 22
2
Question about TargetLowering::SimplifyDemandedBits with AND
Hi All,
I have faced a problem with TargetLowering::SimplifyDemandedBits with
AND. Here is a example as following:
/* C source code */
struct A
{
unsigned int a;
unsigned char c1, c2;
bool b1 : 1;
bool b2 : 1;
bool b3 : 1;
};
int main ()
{
struct A x[1];
x[0].b1 = false;
int s = 0;
s = x[0].b1 ? 1 : 0; <--- Here is problem.
if (s != 0)
__builtin_abort
2020 Feb 19
2
i1 true ^= -1 in DAG matcher?
The vnot PatFrag uses ImmAllOnesV which should put an OPC_CheckImmAllOnesV
in the matcher table. And the matcher table should call
ISD::isBuildVectorAllOnes. I believe we use vnot with vXi1 vectors on X86
and I haven't seen any issues.
The FIXME you pointed to seems related to a scalar patcher not a vector
pattern. In that case the issue is that the immediate matcher for scalars
calls