search for: zambotti

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2020 Mar 09
2
Manipulating Arch specific code generator state
Hello all on the list, I’m developing a backend for the 65816, however, I need a way to store some state, as processor flags can affect how instructions operate (including the length of some), as well as the calling convention. I need to track for each of these flags (x, m, and e) Set, Unset, Indeterminate. I was wondering if there was a nice way to store this with the MBB, so I can make sure
2020 Mar 12
3
Getting up to speed with llvm backends. Machine Instruction operands.
Welcome to all Questions from veteran programmer with no LLVM backend experience evaluating llvm for creating a Hitachi 6309 backend. This post is about finding out more about machine instruction operands. The documentation I have read so far includes: - the online manuals - Building an LLVM Backend. Fraser Cormack Pierre-André Saulais - The Design of a Custom 32-bit RISC CPU