search for: zaks

Displaying 20 results from an estimated 255 matches for "zaks".

2016 Sep 01
2
enabling interleaved access loop vectorization
...to effectively have power-of-2 strides and/or alignment. > So, unfortunately, it turns out I don't have access to DENBench. If you like we could test your patch to see how it (mis)behaves. From: Michael Kuperstein [mailto:mkuper at google.com] Sent: Thursday, August 18, 2016 03:57 To: Zaks, Ayal <ayal.zaks at intel.com> Cc: Demikhovsky, Elena <elena.demikhovsky at intel.com>; Renato Golin <renato.golin at linaro.org>; Matthew Simpson <mssimpso at codeaurora.org>; Nema, Ashutosh <Ashutosh.Nema at amd.com>; Sanjay Patel <spatel at rotateright.com>; l...
2016 Aug 17
2
enabling interleaved access loop vectorization
Thanks Ayal! On Wed, Aug 17, 2016 at 2:14 PM, Zaks, Ayal <ayal.zaks at intel.com> wrote: > Hi Michael, > > > > Don’t quite have a full reproducer for you yet. You’re welcome to try and > see what’s happening in 32 bit mode when enabling interleaving for the > following, based on “https://en.wikipedia.org/wiki/YIQ#From_R...
2016 Aug 16
2
enabling interleaved access loop vectorization
...ynamic loop count happens to almost always >> be 1 - and this lives inside a hot outer loop. >> That's something we ought to be handling through PGO (or, conceivably, >> outer loop vectorization :-) ). >> >> Michael >> >> On Mon, Aug 8, 2016 at 3:21 PM, Zaks, Ayal <ayal.zaks at intel.com> wrote: >> >>> > We also need to understand what to do with edge elements in the >>> vector if their loading is not required. We, probably, should issue a >>> masked load in this case. >>> >>> >>> &gt...
1998 Nov 20
1
How do you change Samba Password on NT Machine?
I am running Samba 1.9.18p10 on Digital Unix 4.0D. Is there a way for a user to change their Samba password from their NT machine? I have multiple NT Domain environments running on NT Server 4.0. Users are of mixed NT workstations and 95 My name is Zak. Email: Zak.Ahmed@metrokc.gov <mailto:Zak.Ahmed@metrokc.gov>
2016 Aug 09
2
enabling interleaved access loop vectorization
...pecific instance, the static loop count is unknown, and the dynamic loop count happens to almost always be 1 - and this lives inside a hot outer loop. That's something we ought to be handling through PGO (or, conceivably, outer loop vectorization :-) ). Michael On Mon, Aug 8, 2016 at 3:21 PM, Zaks, Ayal <ayal.zaks at intel.com> wrote: > > We also need to understand what to do with edge elements in the vector > if their loading is not required. We, probably, should issue a masked load > in this case. > > > > The existing code solves such edge cases where the las...
2006 Aug 04
3
Help with short time series
Dear R-list, I have a statistical problem with the comparison of two short time-series of density data in an ecological framework. I have to compare two short time series (5 years, one value for each year) of species density data (it is the density of fish in two different streams) to test if the two means of the five densities are significantly different, so basically if the two mean
2016 Aug 07
2
enabling interleaved access loop vectorization
...o Golin <renato.golin at linaro.org> Cc: Demikhovsky, Elena <elena.demikhovsky at intel.com>; Matthew Simpson <mssimpso at codeaurora.org>; Nema, Ashutosh <Ashutosh.Nema at amd.com>; Sanjay Patel <spatel at rotateright.com>; llvm-dev <llvm-dev at lists.llvm.org>; Zaks, Ayal <ayal.zaks at intel.com> Subject: Re: [llvm-dev] enabling interleaved access loop vectorization On Fri, Aug 5, 2016 at 4:37 PM, Renato Golin <renato.golin at linaro.org<mailto:renato.golin at linaro.org>> wrote: On 6 August 2016 at 00:18, Michael Kuperstein <mkuper at...
2011 Feb 10
3
ror 3 + apache2 + passenger = apache test page
I set up Passenger on manual - http://wiki.rubyonrails.org/deployment/apache-passenger Passenger and Apache install without errors. /etc/httpd/conf/httpd.conf: >> ... >> LoadModule passenger_module >> /usr/local/lib/ruby/gems/1.9.1/gems/passenger-3.0.2/ >> ext/apache2/mod_passenger.so >> PassengerRoot /usr/local/lib/ruby/gems/1.9.1/gems/passenger-3.0.2 >>
2003 Sep 03
8
Asterisk Jitters
Hi, Every time I dial into my asterisk box i hear nothing but asterisk jittering. The following is an example of what I get on the asterisk CLI Thanks *CLI> DEBUG[81926]: File chan_sip.c, Line 3826 (check_user): Setting NAT on RTP to 0 DEBUG[81926]: File chan_sip.c, Line 4807 (handle_request): Check for res DEBUG[81926]: File chan_sip.c, Line 952 (find_user): Call from user
2014 Dec 24
2
[LLVMdev] Indexed Load and Store Intrinsics - proposal
----- Original Message ----- > From: "Xinmin Tian" <xinmin.tian at intel.com> > To: "Hal Finkel" <hfinkel at anl.gov>, "Ayal Zaks" <ayal.zaks at intel.com> > Cc: dag at cray.com, "Robert Khasanov" <robert.khasanov at intel.com>, llvmdev at cs.uiuc.edu > Sent: Tuesday, December 23, 2014 7:36:44 PM > Subject: RE: [LLVMdev] Indexed Load and Store Intrinsics - proposal > > For non-zero c...
2008 Sep 25
3
OHLC Plot with EMA in it
Hi there I have some timeseries data which I plot in a OHLC Plot. In the same plot I'd like to have the EMA of this timeseries. I tried to add the EMA point to OHLC with lines(), but this doesn't work. Has anyone an idea how to handle it? Regards, Michael Zak
2017 Mar 14
10
[Proposal][RFC] Epilog loop vectorization
...55ep5yhalu/LayoutDescription.png Approach-1 looks feasible, please comment if any objections. Regards, Ashutosh From: Nema, Ashutosh Sent: Wednesday, March 1, 2017 10:42 AM To: 'Daniel Berlin' <dberlin at dberlin.org> Cc: anemet at apple.com; Hal Finkel <hfinkel at anl.gov>; Zaks, Ayal <ayal.zaks at intel.com>; Renato Golin <renato.golin at linaro.org>; mkuper at google.com; Mehdi Amini <mehdi.amini at apple.com>; llvm-dev <llvm-dev at lists.llvm.org> Subject: RE: [llvm-dev] [Proposal][RFC] Epilog loop vectorization Sorry I misunderstood, gvn/newgvn...
2017 Jul 21
2
[SPIR/PTX] Divergence analysis for BasicBlocks
Hello, Yes? Where is allActive defined, I couldn't find it. Basically, a BB is control divergent if it's execution depends on a branch that itself depends on a divergent ssa value. On Fri, Jul 21, 2017 at 4:13 PM, Zaks, Ayal <ayal.zaks at intel.com> wrote: > What would be the definition of “isControlDivergent(BasicBlock*)”; the > complementary of “allActive(BasicBlock*)” – blocks known to execute all > lanes, whenever reached? Note the (distinct) term “rewire targets” that > Ralf Karrenberg use...
2017 Mar 14
2
[Proposal][RFC] Epilog loop vectorization
...esday, March 1, 2017 10:42 AM > *To:* 'Daniel Berlin' <dberlin at dberlin.org > <mailto:dberlin at dberlin.org>> > *Cc:* anemet at apple.com <mailto:anemet at apple.com>; Hal Finkel > <hfinkel at anl.gov <mailto:hfinkel at anl.gov>>; Zaks, Ayal > <ayal.zaks at intel.com <mailto:ayal.zaks at intel.com>>; Renato Golin > <renato.golin at linaro.org <mailto:renato.golin at linaro.org>>; > mkuper at google.com <mailto:mkuper at google.com>; Mehdi Amini > <mehdi.amini at apple.c...
2017 Feb 28
3
[Proposal][RFC] Epilog loop vectorization
...ctorization factor for epilog vector loop. Regards, Ashutosh From: anemet at apple.com [mailto:anemet at apple.com] Sent: Tuesday, February 28, 2017 1:33 AM To: Hal Finkel <hfinkel at anl.gov> Cc: Daniel Berlin <dberlin at dberlin.org>; Nema, Ashutosh <Ashutosh.Nema at amd.com>; Zaks, Ayal <ayal.zaks at intel.com>; Renato Golin <renato.golin at linaro.org>; mkuper at google.com; Mehdi Amini <mehdi.amini at apple.com>; llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] [Proposal][RFC] Epilog loop vectorization On Feb 27, 2017, at 12:01 PM, Ha...
2017 Mar 14
2
[Proposal][RFC] Epilog loop vectorization
...Sent:*Wednesday, March 1, 2017 10:42 AM >> *To:*'Daniel Berlin' <dberlin at dberlin.org <mailto:dberlin at dberlin.org>> >> *Cc:*anemet at apple.com <mailto:anemet at apple.com>; Hal Finkel >> <hfinkel at anl.gov <mailto:hfinkel at anl.gov>>; Zaks, Ayal >> <ayal.zaks at intel.com <mailto:ayal.zaks at intel.com>>; Renato Golin >> <renato.golin at linaro.org >> <mailto:renato.golin at linaro.org>>;mkuper at google.com >> <mailto:mkuper at google.com>; Mehdi Amini <mehdi.amini at appl...
2008 Jul 23
3
[patch] mount add move option
On Wed, Jul 23, 2008 at 11:24:49AM +0200, Karel Zak wrote: > On Wed, Jul 23, 2008 at 04:43:30AM -0400, Christoph Hellwig wrote: > > On Wed, Jul 23, 2008 at 10:39:38AM +0200, maximilian attems wrote: > > > klibc mount has only short options thus uses the following syntax > > Frankly, it seems like a klibc problem... well not directly, but right klibc-utils should have
2009 Apr 14
3
Automating object creation
I am new to R. I would like to automate the creation of a number of vectors but can't seem to get the string formatting to work. Here's what I would like to be able to do: Suppose we have a vector: x <- c(2,4,5) I would like to be able to create a set of vectors whose names are associated with the values in x - e.g. x2 <- 0 x4 <- 0 x5 <- 0 I have tried with a for loop and
2006 Mar 23
11
ActiveRecord: Oracle metadata loading slow on large database
All, While attempting to use ActiveRecord against a large database, approx. 1700 tables and 4 million rows, I discovered an inefficiency in oci_adapter.rb. The problem seems to be the SQL being generated to lazy-load the columns metadata. "def columns(table_name, name = nil)" method generates the following SQL: select column_name, data_type, data_default, nullable,
2017 Mar 14
1
[Proposal][RFC] Epilog loop vectorization
...t;> *To:* 'Daniel Berlin' <dberlin at dberlin.org >> <mailto:dberlin at dberlin.org>> >> *Cc:* anemet at apple.com <mailto:anemet at apple.com>; Hal Finkel >> <hfinkel at anl.gov <mailto:hfinkel at anl.gov>>; Zaks, Ayal >> <ayal.zaks at intel.com <mailto:ayal.zaks at intel.com>>; Renato >> Golin <renato.golin at linaro.org >> <mailto:renato.golin at linaro.org>>; mkuper at google.com >> <mailto:mkuper at google.com>; Mehdi...