search for: zakk

...the ARMISelLowering constructor, it sets the callback function with setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); My question is ARM don’t support MVT::i1 registerclass, why should it determine this operation with MVT::i1 value? Can anyone tell me? Thank you very much. Best regards, Zakk -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110902/886c3b23/attachment.html>

Thanks for all replies, they have been very helpful! Note: Sorry, i forgot to group reply.... ---------- Forwarded message ---------- From: Duncan Sands <baldrick at free.fr> Date: 2011/9/4 Subject: Re: [LLVMdev] Some questions on SelectionDAG To: Zakk <zakk0610 at gmail.com> Hi Zak, Therefore, after the LegalizeType phase, maybe SelectionDAG have > unsupported > type node? > no. As I tried to explain, there is no node with type MVT:i1 after type legalization. There is a VALUETYPE node with type MVT::Other that contains the...

David Blaikie <dblaikie at gmail.com> 於 2020年1月14日 週二 上午2:15寫道： > > > On Mon, Jan 13, 2020 at 6:12 AM Zakk <zakk0610 at gmail.com> wrote: > >> >> >> David Blaikie via llvm-dev <llvm-dev at lists.llvm.org> 於 2020年1月11日 週六 >> 上午2:03寫道： >> >>> Ah, OK - thanks for walking me through that. >>> >>> Fair enough, I think I understand the is...

...or the ABIs which support hardware > floating point. Therefore adding the `target-abi` metadata at the very > least can help catch places where modules with incompatible ABIs are merged. > > With this in mind, our plan is the following: > > 1. We have two patches, both prepared by Zakk, one to add the `target-abi` > to the module flags (https://reviews.llvm.org/D72755), and one to check > that LLVM has been passed the correct `target-abi` to match the module ( > https://reviews.llvm.org/D72768). > These two are intended to ensure that we are compiling the module as...

...t. Therefore adding the `target-abi` metadata at the >>> very least can help catch places where modules with incompatible ABIs are >>> merged. >>> >>> With this in mind, our plan is the following: >>> >>> 1. We have two patches, both prepared by Zakk, one to add the >>> `target-abi` to the module flags (https://reviews.llvm.org/D72755), and >>> one to check that LLVM has been passed the correct `target-abi` to match >>> the module (https://reviews.llvm.org/D72768). >>> These two are intended to ensure that...

...t; > llvm-dev at lists.llvm.org> wrote: > >> I also work on the RISC-V backend, and have been doing a little work on >> the ELF psABI document for RISC-V. >> >> I agree that, conceptually, the psABI choice should be in the module >> metadata. >> >> Zakk, however, has discovered a phase ordering issue within LLVM that >> relates to this approach. The phase ordering problem is that the LTO >> backend is currently setup without interrogating the current module for any >> information which might affect its setup. He has two patches t...

> On Jan 6, 2020, at 14:29, David Blaikie via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > On Mon, Jan 6, 2020 at 5:58 AM Zakk <zakk0610 at gmail.com <mailto:zakk0610 at gmail.com>> wrote: > > > David Blaikie <dblaikie at gmail.com <mailto:dblaikie at gmail.com>> 於 2020年1月6日 週一 下午2:23寫道： > If this is something that can vary per file in a compilation and resolve correctly when one objec...

I also work on the RISC-V backend, and have been doing a little work on the ELF psABI document for RISC-V. I agree that, conceptually, the psABI choice should be in the module metadata. Zakk, however, has discovered a phase ordering issue within LLVM that relates to this approach. The phase ordering problem is that the LTO backend is currently setup without interrogating the current module for any information which might affect its setup. He has two patches that propose two different w...

On Oct 15, 2013, at 9:28 PM, Zakk <zakk0610 at gmail.com> wrote: > Hi Andy, thanks for your help!! > The scheduled code by method A is same as B when using the new machine model. > it's make sense, but there is the another problem, the scheduled code is badly. > > load/store instruction always reuse the...

...that "[mips] Pass ABI name via -target-abi instead of target-features"? I don't know WHY -target-abi is passing via different option, not via -mattr (subtarget feature) maybe usually subtarget feature is used to manages different specific ISA. > On Sun, Jan 5, 2020 at 10:04 PM Zakk via llvm-dev <llvm-dev at lists.llvm.org> > wrote: > >> Hi all. >> >> There are two steps in LTO codegen so the problem is how to pass ABI info >> into LTO code generator. >> >> The easier way is pass -target-abi via option to LTO codegen, but there &...

...} bne .LBB0_1 bx lr this is just because A9's per-operand machine model is not implemented well? By the way, why do you want to use the new machine model for mi-sched? Thanks, Kind regards Kuan-Hsu 2013/10/15 Andrew Trick <atrick at apple.com> > > On Oct 14, 2013, at 3:27 AM, Zakk <zakk0610 at gmail.com> wrote: > > Hi all, > I meet this problem when compiling the TREAM benchmark ( > http://www.cs.virginia.edu/stream/FTP/Code/) with enable-misched > > The small function will be scheduled as good code, but if opt inline this > function, the inline pa...

...ource<1>; def WB: ProcResource<1>; } def : WriteRes<WriteALU, [IF, ID, EX1, WB]> ; or define each stage as SchedWrite type and use WriteSequence to define this sequence? Thanks, Kuan-Hsu 2013/10/16 Andrew Trick <atrick at apple.com> > > On Oct 15, 2013, at 9:28 PM, Zakk <zakk0610 at gmail.com> wrote: > > Hi Andy, thanks for your help!! > The scheduled code by method A is same as B when using the new machine > model. > it's make sense, but there is the another problem, the scheduled code is > badly. > > load/store instruction alway...

...> >>>>> >>>>> >>>>> On Jan 6, 2020, at 14:29, David Blaikie via llvm-dev < >>>>> llvm-dev at lists.llvm.org> wrote: >>>>> >>>>> >>>>> >>>>> On Mon, Jan 6, 2020 at 5:58 AM Zakk <zakk0610 at gmail.com> wrote: >>>>> >>>>>> >>>>>> >>>>>> David Blaikie <dblaikie at gmail.com> 於 2020年1月6日 週一 下午2:23寫道： >>>>>> >>>>>>> If this is something that can vary per file...

...rs at apple.com <mailto:daniel_l_sanders at apple.com>> wrote: > > >> On Jan 6, 2020, at 14:29, David Blaikie via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> >> >> On Mon, Jan 6, 2020 at 5:58 AM Zakk <zakk0610 at gmail.com <mailto:zakk0610 at gmail.com>> wrote: >> >> >> David Blaikie <dblaikie at gmail.com <mailto:dblaikie at gmail.com>> 於 2020年1月6日 週一 下午2:23寫道： >> If this is something that can vary per file in a compilation and resolve correctl...

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...nders <daniel_l_sanders at apple.com> >> wrote: >> >>> >>> >>> On Jan 6, 2020, at 14:29, David Blaikie via llvm-dev < >>> llvm-dev at lists.llvm.org> wrote: >>> >>> >>> >>> On Mon, Jan 6, 2020 at 5:58 AM Zakk <zakk0610 at gmail.com> wrote: >>> >>>> >>>> >>>> David Blaikie <dblaikie at gmail.com> 於 2020年1月6日 週一 下午2:23寫道： >>>> >>>>> If this is something that can vary per file in a compilation and >>>>> resol...

You mean like *llvm-gcc-4.2 -O2 -emit-llvm Hello.c -c -o Hello.bc* But still i am not able to observe any effect on bit code by running *opt-2.8 -loop-unroll Hello.bc -o Hello_unroll.bc* On Tue, May 3, 2011 at 3:58 AM, Zakk <zakk0610 at gmail.com> wrote: > Hi, you need to run some optimization passes first. (like -O2) > > 2011/5/3 Manish Gupta <mgupta.iitr at gmail.com> > >> I just want to try loop-unroll and see corresponding changes in the >> bitcode file. For that any loop will...

Hi, you need to run some optimization passes first. (like -O2) 2011/5/3 Manish Gupta <mgupta.iitr at gmail.com> > I just want to try loop-unroll and see corresponding changes in the bitcode > file. For that any loop will do. Have you been able to test llvm loop-unroll > successfully? > > > On Mon, May 2, 2011 at 10:04 PM, Yuan Pengfei <coolypf at qq.com> wrote: >

...gupta.iitr at gmail.com> wrote: > You mean like > > *llvm-gcc-4.2 -O2 -emit-llvm Hello.c -c -o Hello.bc* > > But still i am not able to observe any effect on bit code by running > > *opt-2.8 -loop-unroll Hello.bc -o Hello_unroll.bc* > > On Tue, May 3, 2011 at 3:58 AM, Zakk <zakk0610 at gmail.com> wrote: > >> Hi, you need to run some optimization passes first. (like -O2) >> >> 2011/5/3 Manish Gupta <mgupta.iitr at gmail.com> >> >>> I just want to try loop-unroll and see corresponding changes in the >>> bitcode f...

Greetings. I''ve reviewed the list archives, particularly the posts from Zakk, on this subject, and found results similar to his. drbd provides a block-drbd script, but with full virtualization, at least on RHEL 5, this does not work; by the time the block script is run, the qemu-dm has already been started. Instead I''ve been simply musing the possibility of ke...