search for: z13

...tween the compilers: clang adds 1 and stores it back to 'a' in each iteration, while gcc instead figures out the value a has after the loop (0) and stores it then once to 'a'. /Jonas int a = 1; void b() {   do     if (a)       a++;   while (a != 0); } bin/clang -O3 -march=z13 -mllvm -unroll-count=1         .text         .file   "testfun.i"         .globl  b                       # -- Begin function b         .p2align        4         .type   b, at function b:                                      # @b # %bb.0:                                # %entry     ...

...| Z1+ Z2 + Z3 + Z4 + Z5 + Z6 + Z7 + Z8), data = testsamp) I have no problems with this. However, if the set of random effects has a dimension of 30, then the lmer call is: fit2<-lmer(LogY ~ WYear + (1 | Site) + (1 | Year) + (1 | Z1+Z2 + Z3 + Z4 + Z5 + Z6 + Z7 + Z8 + Z9 + Z10 + Z11 + Z12 + Z13 + Z14 + Z15 + Z16 + Z17 + Z18 + Z19 + Z20 + Z21 + Z22 + Z23 + Z24 + Z25 + Z26 + Z27 + Z28 + Z29+ Z30), data = testsamp) In this case, I get an error because the name "Z1+Z2 + Z3 + Z4 + Z5 + Z6 + Z7 + Z8 + Z9 + Z10 + Z11 + Z12 + Z13 + Z14 + Z15 + Z16 + Z17 + Z18 + Z19 + Z20 + Z21 + Z22 +...

...e to an element of the struct via a pointer is surrounded with two loads of a global double variable. Only Clang emits two loads. typedef struct {   double c[3][3]; } STRUCT_TY; double e = 0.0; STRUCT_TY *f; int g = 0; void h() {   int i = e;   f->c[0][i] = g;   g = e; } clang -O3-march=z13 : h:                                      # @h # %bb.0:                                # %entry         larl    %r1, e         ld      %f0, 0(%r1)        // LOAD E         lrl     %r2, g         cfdbr   %r0, 5, %f0        // CONVERT E         lgfr    %r0, %r0           // EXTEND E         cd...

...mits two loads. > > typedef struct { >   double c[3][3]; > } STRUCT_TY; > > double e = 0.0; > STRUCT_TY *f; > int g = 0; > void h() { >   int i = e; >   f->c[0][i] = g; >   g = e; > } > > clang -O3-march=z13 : > > h:                                      # @h > # %bb.0:                                # %entry >         larl    %r1, e >         ld      %f0, 0(%r1)        // LOAD E >         lrl     %r2, g >         cfdbr   %r0, 5, %f0        // CONVERT E >...

On 17 March 2017 at 16:34, Hal Finkel <hfinkel at anl.gov> wrote: > In general, this is true everywhere. In a large vectorized loop, this cost > may well be worthwhile. The idea is that the cost model should account for > all of these costs. If it doesn't properly, we should fix that. Isn't this only worth when the SIMD instructions can be conditionalised per lane? I

...-Cal System Equipment/Z11-Frontend/calib.h,v CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z11-Frontend/history.txt,v CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z12-Calibration Database/ CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z12-Calibration Database/CVS/ CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z13-MiniCrunch2/ CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z13-MiniCrunch2/CVS/ CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z14-Crunch2k4/ CVS/cvsrepo/EDMI/1560-Cal System Equipment/Z14-Crunch2k4/CVS/ Is there any way to keep the verbosity high enough to print the transferred files only? Otherwise eve...

...uld support only the local-exec TLS model.) > > LLVM now uses the POPCNT instruction on z196 and above. > > LLVM now uses the RISBGN instruction on zEC12 and above. > > LLVN now supports the transactional-execuction facility > on zEC12 and above. > > LLVM now supports the z13 processor and its vector facility. http://llvm.org/viewvc/llvm-project?rev=245102&view=rev > clang: > > Clang will now always default to the z10 processor when compiling > without any -march= option. Previous releases used to automatically > detect the current host CPU when co...

...t >> c67df11f(vhost_net: try batch dequing from skb array) as discussed >> in the following thread: >> https://www.mail-archive.com/netdev at vger.kernel.org/msg187936.html > > Series > > Acked-by: Michael S. Tsirkin <mst at redhat.com> Tested this series on a z13 (s390x) on top of net-next using 4GB/4vcpu guests. Verified that both the reported TCP throughput regression and memory leak are resolved. net-next: 19.83 Gb/s net-next+: 35.02 Gb/s Thanks all! Matt > > >> v4: >> - fix zero iov iterator count in tap/tap_do_read()(Jason) &g...

...t >> c67df11f(vhost_net: try batch dequing from skb array) as discussed >> in the following thread: >> https://www.mail-archive.com/netdev at vger.kernel.org/msg187936.html > > Series > > Acked-by: Michael S. Tsirkin <mst at redhat.com> Tested this series on a z13 (s390x) on top of net-next using 4GB/4vcpu guests. Verified that both the reported TCP throughput regression and memory leak are resolved. net-next: 19.83 Gb/s net-next+: 35.02 Gb/s Thanks all! Matt > > >> v4: >> - fix zero iov iterator count in tap/tap_do_read()(Jason) &g...

...ter the loop? Is there an option to change this behavior in gcc or clang? It seems that gcc is assuming a single thread, while clang is not. It would be nice to have the same setting here when comparing them. Or am I missing something? Thanks Jonas > >> >> bin/clang -O3 -march=z13 -mllvm -unroll-count=1 >> >>         .text >>         .file   "testfun.i" >>         .globl  b                       # -- Begin function b >>         .p2align        4 >>         .type   b, at function >> b:                                      #...

Hi, while implementing SystemZTTI:getCacheSize(), it became clear that there really isn't a simple way to just ask the Subtarget for the current subtarget machine model. I was thinking like something of an enum that would also reflect the subtarget series (and would allow >= and similar operations). I would like to ask what the ideas are on how this should be done best. Some

...SystemZ backend. We have found this to be useful, and discovered many instructions where the hasSideEffects flag was incorrectly set while it actually shouldn't. The attached patch and test case triggers an assert in TwoAddress.  (bin/llc ./tc_TwoAddr_crash.ll -mtriple=s390x-linux-gnu -mcpu=z13) The only change in the patch is to remove the side effects flag from one instruction: -  def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>; +  let hasSideEffects = 0 in +    def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>; The input to TwoAddress is: BB#0: derived from LLVM BB...

...dequing from skb array) as discussed > >> in the following thread: > >> https://www.mail-archive.com/netdev at vger.kernel.org/msg187936.html > > > > Series > > > > Acked-by: Michael S. Tsirkin <mst at redhat.com> > > Tested this series on a z13 (s390x) on top of net-next using 4GB/4vcpu > guests. Verified that both the reported TCP throughput regression and > memory leak are resolved. > > net-next: 19.83 Gb/s > net-next+: 35.02 Gb/s > > Thanks all! > > Matt So we can also add Tested-by: Matthew Rosato <...

Well the subject says it all really, it was a great shame since the last two tomb raider games worked perfectly, after installing 'Underworld', some months back, I found it did not work. After spending the last few months waiting, it seems to have improved with the latest version of WINE. In the latest WINE, if the camera is very close to Lara, the picture magically appears (with some

...'ll try and go ahead with the SystemZ back-end to see how complicated > it would actually be to add those nodes, so that we can make an > informed decision. I've now implemented the above to handle all the currently supported STRICT_ FP nodes in the SystemZ back-end (at least for pre-z13 machines, I'm not supporting vector instructions yet): https://reviews.llvm.org/D45576 I've tested this using a hacked clang front-end that always uses constrained intrisincs in place of most regular FP operations, and it at least still passes the LNT test-suite. I'd appreciate any c...

Dear everyone, The in-progress release notes for 3.7 [1,2] make it look like we didn't do very much over the past six months. Obviously that's not the case at all, so let's get them in shape! If you've been thinking "I should probably add this to the release notes at some point", now is the time :-) I have a list below of changes that might be worth mentioning. I

...be copied to and from a virtual register around that call, but this is not being done. Am I missing something here? So, in short, should these registers be saved/restored in caller, and if so how should this be done? /Jonas Attached is a test case where this happens on SystemZ. bin/llc -mcpu=z13 -enable-ipra  ./tc_ipra_fp.ll -o out.s -------------- next part -------------- %0 = type { [3 x i64] } ; Function Attrs: norecurse nounwind declare dso_local fastcc signext i32 @foo(i16*, i32 signext) unnamed_addr ; Function Attrs: norecurse nounwind define internal fastcc void @fun1(i16*, i16...

...backend. We have found this to be useful, and discovered many instructions where the hasSideEffects flag was incorrectly set while it actually shouldn't. > > The attached patch and test case triggers an assert in TwoAddress. (bin/llc ./tc_TwoAddr_crash.ll -mtriple=s390x-linux-gnu -mcpu=z13) > > The only change in the patch is to remove the side effects flag from one instruction: > > - def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>; > + let hasSideEffects = 0 in > + def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>; > > The input to Two...

...ed. I wonder how this should be resolved. It seems there should be some flag (read-undef?) on the ST128 or something after Virtual Register Rewriter. Or is the target actually supposed to check liveness of register during post-RA pseudo expansion? /Jonas bin/llc -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs -------------- next part -------------- ; ModuleID = '/tmp/autogen.bc' source_filename = "/tmp/autogen.bc" define void @autogen_SD29355(i8*, i32*, i64*, i32, i64, i8) { BB: %A4 = alloca double %A3 = alloca float %A2 = alloca i8 %A1 = alloca double...

Hi Andrew, sorry for the delay, I only now got some time to look into this a bit more. But I still have a number of questions of how to actually implement this in the back end. Looking at this bottom-up, starting with the behavior of the actual machine instructions, we have (at least on SystemZ) the following things to consider: A) Rounding mode Most FP arithmetic instructions use the